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-rw-r--r--target/linux/sunxi/patches-3.14/122-dt-sun7i-add-pinmuxing-for-gmac.patch48
1 files changed, 0 insertions, 48 deletions
diff --git a/target/linux/sunxi/patches-3.14/122-dt-sun7i-add-pinmuxing-for-gmac.patch b/target/linux/sunxi/patches-3.14/122-dt-sun7i-add-pinmuxing-for-gmac.patch
deleted file mode 100644
index d539af245d..0000000000
--- a/target/linux/sunxi/patches-3.14/122-dt-sun7i-add-pinmuxing-for-gmac.patch
+++ /dev/null
@@ -1,48 +0,0 @@
-From 9f6deb688f4cb733cd3f36e0cc88f14d2f81982d Mon Sep 17 00:00:00 2001
-From: Chen-Yu Tsai <wens@csie.org>
-Date: Mon, 10 Feb 2014 18:35:50 +0800
-Subject: [PATCH] ARM: dts: sun7i: Add pin muxing options for the GMAC
-
-The A20 has EMAC and GMAC muxed on the same pins.
-Add pin sets with gmac function for MII and RGMII mode to the DTSI.
-
-Signed-off-by: Chen-Yu Tsai <wens@csie.org>
----
- arch/arm/boot/dts/sun7i-a20.dtsi | 26 ++++++++++++++++++++++++++
- 1 file changed, 26 insertions(+)
-
---- a/arch/arm/boot/dts/sun7i-a20.dtsi
-+++ b/arch/arm/boot/dts/sun7i-a20.dtsi
-@@ -492,6 +492,32 @@
- allwinner,drive = <0>;
- allwinner,pull = <0>;
- };
-+
-+ gmac_pins_mii_a: gmac_mii@0 {
-+ allwinner,pins = "PA0", "PA1", "PA2",
-+ "PA3", "PA4", "PA5", "PA6",
-+ "PA7", "PA8", "PA9", "PA10",
-+ "PA11", "PA12", "PA13", "PA14",
-+ "PA15", "PA16";
-+ allwinner,function = "gmac";
-+ allwinner,drive = <0>;
-+ allwinner,pull = <0>;
-+ };
-+
-+ gmac_pins_rgmii_a: gmac_rgmii@0 {
-+ allwinner,pins = "PA0", "PA1", "PA2",
-+ "PA3", "PA4", "PA5", "PA6",
-+ "PA7", "PA8", "PA10",
-+ "PA11", "PA12", "PA13",
-+ "PA15", "PA16";
-+ allwinner,function = "gmac";
-+ /*
-+ * data lines in RGMII mode use DDR mode
-+ * and need a higher signal drive strength
-+ */
-+ allwinner,drive = <3>;
-+ allwinner,pull = <0>;
-+ };
- };
-
- timer@01c20c00 {