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-rw-r--r--target/linux/sunxi/patches-3.13/190-stmmac-enable-main-clock-when-probing.patch71
1 files changed, 71 insertions, 0 deletions
diff --git a/target/linux/sunxi/patches-3.13/190-stmmac-enable-main-clock-when-probing.patch b/target/linux/sunxi/patches-3.13/190-stmmac-enable-main-clock-when-probing.patch
new file mode 100644
index 0000000000..f7085843d3
--- /dev/null
+++ b/target/linux/sunxi/patches-3.13/190-stmmac-enable-main-clock-when-probing.patch
@@ -0,0 +1,71 @@
+From 133a9b75e2b0c48cd1d8f93b0ee61089821c32d9 Mon Sep 17 00:00:00 2001
+From: Chen-Yu Tsai <wens@csie.org>
+Date: Sat, 7 Dec 2013 01:29:34 +0800
+Subject: [PATCH] net: stmmac: Enable stmmac main clock when probing hardware
+
+Signed-off-by: Chen-Yu Tsai <wens@csie.org>
+---
+ drivers/net/ethernet/stmicro/stmmac/stmmac_main.c | 24 +++++++++++++----------
+ 1 file changed, 14 insertions(+), 10 deletions(-)
+
+diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c b/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c
+index 8a7a23a..4d75cba 100644
+--- a/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c
++++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c
+@@ -2682,10 +2682,17 @@ struct stmmac_priv *stmmac_dvr_probe(struct device *device,
+ if ((phyaddr >= 0) && (phyaddr <= 31))
+ priv->plat->phy_addr = phyaddr;
+
++ priv->stmmac_clk = clk_get(priv->device, STMMAC_RESOURCE_NAME);
++ if (IS_ERR(priv->stmmac_clk)) {
++ pr_warn("%s: warning: cannot get CSR clock\n", __func__);
++ goto error_clk_get;
++ }
++ clk_prepare_enable(priv->stmmac_clk);
++
+ /* Init MAC and get the capabilities */
+ ret = stmmac_hw_init(priv);
+ if (ret)
+- goto error_free_netdev;
++ goto error_hw_init;
+
+ ndev->netdev_ops = &stmmac_netdev_ops;
+
+@@ -2723,12 +2730,6 @@ struct stmmac_priv *stmmac_dvr_probe(struct device *device,
+ goto error_netdev_register;
+ }
+
+- priv->stmmac_clk = clk_get(priv->device, STMMAC_RESOURCE_NAME);
+- if (IS_ERR(priv->stmmac_clk)) {
+- pr_warn("%s: warning: cannot get CSR clock\n", __func__);
+- goto error_clk_get;
+- }
+-
+ /* If a specific clk_csr value is passed from the platform
+ * this means that the CSR Clock Range selection cannot be
+ * changed at run-time and it is fixed. Viceversa the driver'll try to
+@@ -2753,15 +2754,18 @@ struct stmmac_priv *stmmac_dvr_probe(struct device *device,
+ }
+ }
+
++ clk_disable_unprepare(priv->stmmac_clk);
++
+ return priv;
+
+ error_mdio_register:
+- clk_put(priv->stmmac_clk);
+-error_clk_get:
+ unregister_netdev(ndev);
+ error_netdev_register:
+ netif_napi_del(&priv->napi);
+-error_free_netdev:
++error_hw_init:
++ clk_disable_unprepare(priv->stmmac_clk);
++ clk_put(priv->stmmac_clk);
++error_clk_get:
+ free_netdev(ndev);
+
+ return NULL;
+--
+1.8.5.1
+