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-rw-r--r--target/linux/sunxi/patches-3.12/190-ahci-missing-dma-for-sunxi.patch60
1 files changed, 60 insertions, 0 deletions
diff --git a/target/linux/sunxi/patches-3.12/190-ahci-missing-dma-for-sunxi.patch b/target/linux/sunxi/patches-3.12/190-ahci-missing-dma-for-sunxi.patch
new file mode 100644
index 0000000000..c7a529967b
--- /dev/null
+++ b/target/linux/sunxi/patches-3.12/190-ahci-missing-dma-for-sunxi.patch
@@ -0,0 +1,60 @@
+From a4c21089299ba411d998b16423a76cbae111194e Mon Sep 17 00:00:00 2001
+From: Oliver Schinagl <oliver@schinagl.nl>
+Date: Mon, 2 Dec 2013 16:13:32 +0100
+Subject: [PATCH] RFC: AHCI: libahci is missing DMA
+
+The Allwinner sunxi platforms have patched in the following to enable
+DMA. This patch enables DMA controllers for the SUNXI Architecture.
+
+Signed-off-by: Olliver Schinagl <oliver@schinagl.nl>
+---
+ drivers/ata/ahci.h | 6 ++++++
+ drivers/ata/libahci.c | 8 ++++++++
+ 2 files changed, 14 insertions(+)
+
+diff --git a/drivers/ata/ahci.h b/drivers/ata/ahci.h
+index 2289efd..2bf2423 100644
+--- a/drivers/ata/ahci.h
++++ b/drivers/ata/ahci.h
+@@ -138,6 +138,7 @@ enum {
+ PORT_SCR_NTF = 0x3c, /* SATA phy register: SNotification */
+ PORT_FBS = 0x40, /* FIS-based Switching */
+ PORT_DEVSLP = 0x44, /* device sleep */
++ PORT_DMA = 0x70, /* direct memory access */
+
+ /* PORT_IRQ_{STAT,MASK} bits */
+ PORT_IRQ_COLD_PRES = (1 << 31), /* cold presence detect */
+@@ -209,6 +210,11 @@ enum {
+ PORT_DEVSLP_DSP = (1 << 1), /* DevSlp present */
+ PORT_DEVSLP_ADSE = (1 << 0), /* Aggressive DevSlp enable */
+
++ /* PORT_DMA bits */
++ PORT_DMA_SETUP_OFFSET = 8, /* dma setup offset */
++ PORT_DMA_SETUP_MASK = (0xff << PORT_DMA_SETUP_OFFSET),/* dma mask */
++ PORT_DMA_SETUP_INIT = (0x44 << 0),
++
+ /* hpriv->flags bits */
+
+ #define AHCI_HFLAGS(flags) .private_data = (void *)(flags)
+diff --git a/drivers/ata/libahci.c b/drivers/ata/libahci.c
+index c482f8c..d697a74 100644
+--- a/drivers/ata/libahci.c
++++ b/drivers/ata/libahci.c
+@@ -570,6 +570,14 @@ void ahci_start_engine(struct ata_port *ap)
+ void __iomem *port_mmio = ahci_port_base(ap);
+ u32 tmp;
+
++#ifdef CONFIG_ARCH_SUNXI
++ /* Setup DMA before DMA start */
++ tmp = readl(port_mmio + PORT_DMA);
++ tmp &= ~PORT_DMA_SETUP_MASK;
++ tmp |= PORT_DMA_SETUP_INIT << PORT_DMA_SETUP_OFFSET;
++ writel(tmp, port_mmio + PORT_DMA);
++#endif
++
+ /* start DMA */
+ tmp = readl(port_mmio + PORT_CMD);
+ tmp |= PORT_CMD_START;
+--
+1.8.5.1
+