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-rw-r--r--target/linux/sunxi/patches-3.12/111-clk-composite-determine-rate.patch74
1 files changed, 74 insertions, 0 deletions
diff --git a/target/linux/sunxi/patches-3.12/111-clk-composite-determine-rate.patch b/target/linux/sunxi/patches-3.12/111-clk-composite-determine-rate.patch
new file mode 100644
index 0000000000..0b4697a605
--- /dev/null
+++ b/target/linux/sunxi/patches-3.12/111-clk-composite-determine-rate.patch
@@ -0,0 +1,74 @@
+From de7bfadd1022613ab2c7eeca124bb1e4a6f4c072 Mon Sep 17 00:00:00 2001
+From: =?UTF-8?q?Emilio=20L=C3=B3pez?= <emilio@elopez.com.ar>
+Date: Thu, 5 Sep 2013 19:43:33 -0300
+Subject: [PATCH] clk: composite: .determine_rate support
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+This commit adds .determine_rate support to the composite clock. It will
+use the .determine_rate callback from the rate component if available,
+and fall back on the mux component otherwise. This allows composite
+clocks to enjoy the benefits of automatic clock reparenting.
+
+Signed-off-by: Emilio López <emilio@elopez.com.ar>
+---
+ drivers/clk/clk-composite.c | 28 ++++++++++++++++++++++++++++
+ 1 file changed, 28 insertions(+)
+
+diff --git a/drivers/clk/clk-composite.c b/drivers/clk/clk-composite.c
+index a33f46f..753d0b7 100644
+--- a/drivers/clk/clk-composite.c
++++ b/drivers/clk/clk-composite.c
+@@ -55,6 +55,30 @@ static unsigned long clk_composite_recalc_rate(struct clk_hw *hw,
+ return rate_ops->recalc_rate(rate_hw, parent_rate);
+ }
+
++static long clk_composite_determine_rate(struct clk_hw *hw, unsigned long rate,
++ unsigned long *best_parent_rate,
++ struct clk **best_parent_p)
++{
++ struct clk_composite *composite = to_clk_composite(hw);
++ const struct clk_ops *rate_ops = composite->rate_ops;
++ const struct clk_ops *mux_ops = composite->mux_ops;
++ struct clk_hw *rate_hw = composite->rate_hw;
++ struct clk_hw *mux_hw = composite->mux_hw;
++
++ if (rate_hw && rate_ops && rate_ops->determine_rate) {
++ rate_hw->clk = hw->clk;
++ return rate_ops->determine_rate(rate_hw, rate, best_parent_rate,
++ best_parent_p);
++ } else if (mux_hw && mux_ops && mux_ops->determine_rate) {
++ mux_hw->clk = hw->clk;
++ return mux_ops->determine_rate(rate_hw, rate, best_parent_rate,
++ best_parent_p);
++ } else {
++ pr_err("clk: clk_composite_determine_rate function called, but no mux or rate callback set!\n");
++ return 0;
++ }
++}
++
+ static long clk_composite_round_rate(struct clk_hw *hw, unsigned long rate,
+ unsigned long *prate)
+ {
+@@ -147,6 +171,8 @@ struct clk *clk_register_composite(struct device *dev, const char *name,
+ composite->mux_ops = mux_ops;
+ clk_composite_ops->get_parent = clk_composite_get_parent;
+ clk_composite_ops->set_parent = clk_composite_set_parent;
++ if (mux_ops->determine_rate)
++ clk_composite_ops->determine_rate = clk_composite_determine_rate;
+ }
+
+ if (rate_hw && rate_ops) {
+@@ -170,6 +196,8 @@ struct clk *clk_register_composite(struct device *dev, const char *name,
+ composite->rate_hw = rate_hw;
+ composite->rate_ops = rate_ops;
+ clk_composite_ops->recalc_rate = clk_composite_recalc_rate;
++ if (rate_ops->determine_rate)
++ clk_composite_ops->determine_rate = clk_composite_determine_rate;
+ }
+
+ if (gate_hw && gate_ops) {
+--
+1.8.5.1
+