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-rw-r--r--target/linux/realtek/dts-5.10/rtl8382_d-link_dgs-1210-28.dts91
-rw-r--r--target/linux/realtek/dts-5.10/rtl8382_d-link_dgs-1210-28_common.dtsi91
-rw-r--r--target/linux/realtek/dts-5.10/rtl8382_d-link_dgs-1210-28mp-f.dts40
-rw-r--r--target/linux/realtek/image/rtl838x.mk9
4 files changed, 141 insertions, 90 deletions
diff --git a/target/linux/realtek/dts-5.10/rtl8382_d-link_dgs-1210-28.dts b/target/linux/realtek/dts-5.10/rtl8382_d-link_dgs-1210-28.dts
index cf7b888fc9..0bcb196b7c 100644
--- a/target/linux/realtek/dts-5.10/rtl8382_d-link_dgs-1210-28.dts
+++ b/target/linux/realtek/dts-5.10/rtl8382_d-link_dgs-1210-28.dts
@@ -3,98 +3,9 @@
#include "rtl838x.dtsi"
#include "rtl83xx_d-link_dgs-1210_common.dtsi"
#include "rtl83xx_d-link_dgs-1210_gpio.dtsi"
+#include "rtl8382_d-link_dgs-1210-28_common.dtsi"
/ {
compatible = "d-link,dgs-1210-28", "realtek,rtl838x-soc";
model = "D-Link DGS-1210-28";
};
-
-&ethernet0 {
- mdio: mdio-bus {
- compatible = "realtek,rtl838x-mdio";
- regmap = <&ethernet0>;
- #address-cells = <1>;
- #size-cells = <0>;
-
- EXTERNAL_PHY(0)
- EXTERNAL_PHY(1)
- EXTERNAL_PHY(2)
- EXTERNAL_PHY(3)
- EXTERNAL_PHY(4)
- EXTERNAL_PHY(5)
- EXTERNAL_PHY(6)
- EXTERNAL_PHY(7)
-
- INTERNAL_PHY(8)
- INTERNAL_PHY(9)
- INTERNAL_PHY(10)
- INTERNAL_PHY(11)
- INTERNAL_PHY(12)
- INTERNAL_PHY(13)
- INTERNAL_PHY(14)
- INTERNAL_PHY(15)
-
- EXTERNAL_PHY(16)
- EXTERNAL_PHY(17)
- EXTERNAL_PHY(18)
- EXTERNAL_PHY(19)
- EXTERNAL_PHY(20)
- EXTERNAL_PHY(21)
- EXTERNAL_PHY(22)
- EXTERNAL_PHY(23)
-
- EXTERNAL_SFP_PHY(24)
- EXTERNAL_SFP_PHY(25)
- EXTERNAL_SFP_PHY(26)
- EXTERNAL_SFP_PHY(27)
- };
-};
-
-&switch0 {
- ports {
- #address-cells = <1>;
- #size-cells = <0>;
-
- SWITCH_PORT(0, 1, qsgmii)
- SWITCH_PORT(1, 2, qsgmii)
- SWITCH_PORT(2, 3, qsgmii)
- SWITCH_PORT(3, 4, qsgmii)
- SWITCH_PORT(4, 5, qsgmii)
- SWITCH_PORT(5, 6, qsgmii)
- SWITCH_PORT(6, 7, qsgmii)
- SWITCH_PORT(7, 8, qsgmii)
-
- SWITCH_PORT(8, 9, internal)
- SWITCH_PORT(9, 10, internal)
- SWITCH_PORT(10, 11, internal)
- SWITCH_PORT(11, 12, internal)
- SWITCH_PORT(12, 13, internal)
- SWITCH_PORT(13, 14, internal)
- SWITCH_PORT(14, 15, internal)
- SWITCH_PORT(15, 16, internal)
-
- SWITCH_PORT(16, 17, qsgmii)
- SWITCH_PORT(17, 18, qsgmii)
- SWITCH_PORT(18, 19, qsgmii)
- SWITCH_PORT(19, 20, qsgmii)
- SWITCH_PORT(20, 21, qsgmii)
- SWITCH_PORT(21, 22, qsgmii)
- SWITCH_PORT(22, 23, qsgmii)
- SWITCH_PORT(23, 24, qsgmii)
-
- SWITCH_PORT(24, 25, qsgmii)
- SWITCH_PORT(25, 26, qsgmii)
- SWITCH_PORT(26, 27, qsgmii)
- SWITCH_PORT(27, 28, qsgmii)
-
- port@28 {
- ethernet = <&ethernet0>;
- reg = <28>;
- phy-mode = "internal";
- fixed-link {
- speed = <1000>;
- full-duplex;
- };
- };
- };
-};
diff --git a/target/linux/realtek/dts-5.10/rtl8382_d-link_dgs-1210-28_common.dtsi b/target/linux/realtek/dts-5.10/rtl8382_d-link_dgs-1210-28_common.dtsi
new file mode 100644
index 0000000000..17866d5f03
--- /dev/null
+++ b/target/linux/realtek/dts-5.10/rtl8382_d-link_dgs-1210-28_common.dtsi
@@ -0,0 +1,91 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+
+&ethernet0 {
+ mdio: mdio-bus {
+ compatible = "realtek,rtl838x-mdio";
+ regmap = <&ethernet0>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ EXTERNAL_PHY(0)
+ EXTERNAL_PHY(1)
+ EXTERNAL_PHY(2)
+ EXTERNAL_PHY(3)
+ EXTERNAL_PHY(4)
+ EXTERNAL_PHY(5)
+ EXTERNAL_PHY(6)
+ EXTERNAL_PHY(7)
+
+ INTERNAL_PHY(8)
+ INTERNAL_PHY(9)
+ INTERNAL_PHY(10)
+ INTERNAL_PHY(11)
+ INTERNAL_PHY(12)
+ INTERNAL_PHY(13)
+ INTERNAL_PHY(14)
+ INTERNAL_PHY(15)
+
+ EXTERNAL_PHY(16)
+ EXTERNAL_PHY(17)
+ EXTERNAL_PHY(18)
+ EXTERNAL_PHY(19)
+ EXTERNAL_PHY(20)
+ EXTERNAL_PHY(21)
+ EXTERNAL_PHY(22)
+ EXTERNAL_PHY(23)
+
+ EXTERNAL_SFP_PHY(24)
+ EXTERNAL_SFP_PHY(25)
+ EXTERNAL_SFP_PHY(26)
+ EXTERNAL_SFP_PHY(27)
+ };
+};
+
+&switch0 {
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ SWITCH_PORT(0, 1, qsgmii)
+ SWITCH_PORT(1, 2, qsgmii)
+ SWITCH_PORT(2, 3, qsgmii)
+ SWITCH_PORT(3, 4, qsgmii)
+ SWITCH_PORT(4, 5, qsgmii)
+ SWITCH_PORT(5, 6, qsgmii)
+ SWITCH_PORT(6, 7, qsgmii)
+ SWITCH_PORT(7, 8, qsgmii)
+
+ SWITCH_PORT(8, 9, internal)
+ SWITCH_PORT(9, 10, internal)
+ SWITCH_PORT(10, 11, internal)
+ SWITCH_PORT(11, 12, internal)
+ SWITCH_PORT(12, 13, internal)
+ SWITCH_PORT(13, 14, internal)
+ SWITCH_PORT(14, 15, internal)
+ SWITCH_PORT(15, 16, internal)
+
+ SWITCH_PORT(16, 17, qsgmii)
+ SWITCH_PORT(17, 18, qsgmii)
+ SWITCH_PORT(18, 19, qsgmii)
+ SWITCH_PORT(19, 20, qsgmii)
+ SWITCH_PORT(20, 21, qsgmii)
+ SWITCH_PORT(21, 22, qsgmii)
+ SWITCH_PORT(22, 23, qsgmii)
+ SWITCH_PORT(23, 24, qsgmii)
+
+ SWITCH_PORT(24, 25, qsgmii)
+ SWITCH_PORT(25, 26, qsgmii)
+ SWITCH_PORT(26, 27, qsgmii)
+ SWITCH_PORT(27, 28, qsgmii)
+
+ port@28 {
+ ethernet = <&ethernet0>;
+ reg = <28>;
+ phy-mode = "internal";
+ fixed-link {
+ speed = <1000>;
+ full-duplex;
+ };
+ };
+ };
+};
diff --git a/target/linux/realtek/dts-5.10/rtl8382_d-link_dgs-1210-28mp-f.dts b/target/linux/realtek/dts-5.10/rtl8382_d-link_dgs-1210-28mp-f.dts
new file mode 100644
index 0000000000..ce008229b3
--- /dev/null
+++ b/target/linux/realtek/dts-5.10/rtl8382_d-link_dgs-1210-28mp-f.dts
@@ -0,0 +1,40 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+
+#include "rtl838x.dtsi"
+#include "rtl83xx_d-link_dgs-1210_common.dtsi"
+#include "rtl83xx_d-link_dgs-1210_gpio.dtsi"
+#include "rtl8382_d-link_dgs-1210-28_common.dtsi"
+
+/ {
+ compatible = "d-link,dgs-1210-28mp-f", "realtek,rtl8382-soc", "realtek,rtl838x-soc";
+ model = "D-Link DGS-1210-28MP F";
+};
+
+&leds {
+ link_act {
+ label = "green:link_act";
+ gpios = <&gpio1 28 GPIO_ACTIVE_LOW>;
+ };
+
+ poe {
+ label = "green:poe";
+ gpios = <&gpio1 29 GPIO_ACTIVE_LOW>;
+ };
+
+ poe_max {
+ label = "yellow:poe_max";
+ gpios = <&gpio1 27 GPIO_ACTIVE_LOW>;
+ };
+};
+
+&keys {
+ mode {
+ label = "mode";
+ gpios = <&gpio1 30 GPIO_ACTIVE_LOW>;
+ linux,code = <BTN_0>;
+ };
+};
+
+&uart1 {
+ status = "okay";
+};
diff --git a/target/linux/realtek/image/rtl838x.mk b/target/linux/realtek/image/rtl838x.mk
index c33ac7c5c4..eef66c89ce 100644
--- a/target/linux/realtek/image/rtl838x.mk
+++ b/target/linux/realtek/image/rtl838x.mk
@@ -50,6 +50,15 @@ define Device/d-link_dgs-1210-28
endef
TARGET_DEVICES += d-link_dgs-1210-28
+define Device/d-link_dgs-1210-28mp-f
+ $(Device/d-link_dgs-1210)
+ SOC := rtl8382
+ DEVICE_MODEL := DGS-1210-28MP
+ DEVICE_VARIANT := F
+ DEVICE_PACKAGES += realtek-poe
+endef
+TARGET_DEVICES += d-link_dgs-1210-28mp-f
+
# The "IMG-" uImage name allows flashing the iniramfs from the vendor Web UI.
# Avoided for sysupgrade, as the vendor FW would do an incomplete flash.
define Device/engenius_ews2910p