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-rw-r--r--target/linux/rdc/files/arch/i386/kernel/cpu/rdc.c24
-rw-r--r--target/linux/rdc/files/arch/i386/mach-rdc/Makefile5
-rw-r--r--target/linux/rdc/files/arch/i386/mach-rdc/gpio.c91
-rw-r--r--target/linux/rdc/files/arch/i386/mach-rdc/platform.c83
-rw-r--r--target/linux/rdc/files/arch/i386/mach-rdc/wdt.c272
-rw-r--r--target/linux/rdc/files/drivers/leds/leds-rdc3211.c71
-rw-r--r--target/linux/rdc/files/drivers/mtd/maps/imghdr.h25
-rw-r--r--target/linux/rdc/files/drivers/mtd/maps/rdc3210.c379
-rw-r--r--target/linux/rdc/files/drivers/net/r6040.c1041
-rw-r--r--target/linux/rdc/files/include/asm-i386/gpio.h6
-rw-r--r--target/linux/rdc/files/include/asm-i386/mach-generic/gpio.h15
-rw-r--r--target/linux/rdc/files/include/asm-i386/mach-rdc/gpio.h56
-rw-r--r--target/linux/rdc/files/include/asm-i386/mach-rdc/rdc321x_defs.h6
13 files changed, 2074 insertions, 0 deletions
diff --git a/target/linux/rdc/files/arch/i386/kernel/cpu/rdc.c b/target/linux/rdc/files/arch/i386/kernel/cpu/rdc.c
new file mode 100644
index 0000000000..f4b9083bfc
--- /dev/null
+++ b/target/linux/rdc/files/arch/i386/kernel/cpu/rdc.c
@@ -0,0 +1,24 @@
+#include <linux/init.h>
+#include <linux/bitops.h>
+#include <linux/mm.h>
+#include <asm/io.h>
+#include <asm/processor.h>
+
+#include "cpu.h"
+
+static struct cpu_dev rdc_cpu_dev __cpuinitdata = {
+ .c_vendor = "RDC",
+ .c_models = {
+ { .vendor = X86_VENDOR_RDC, .family = 4, .model_names =
+ {
+ [0] = "R861x(-G)",
+ }
+ },
+ },
+};
+
+int __init rdc_init_cpu(void)
+{
+ cpu_devs[X86_VENDOR_RDC] = &rdc_cpu_dev;
+ return 0;
+}
diff --git a/target/linux/rdc/files/arch/i386/mach-rdc/Makefile b/target/linux/rdc/files/arch/i386/mach-rdc/Makefile
new file mode 100644
index 0000000000..5961bc7910
--- /dev/null
+++ b/target/linux/rdc/files/arch/i386/mach-rdc/Makefile
@@ -0,0 +1,5 @@
+#
+# Makefile for the RDC321x specific parts of the kernel
+#
+obj-$(CONFIG_X86_RDC) := gpio.o platform.o wdt.o
+
diff --git a/target/linux/rdc/files/arch/i386/mach-rdc/gpio.c b/target/linux/rdc/files/arch/i386/mach-rdc/gpio.c
new file mode 100644
index 0000000000..dbd03270f1
--- /dev/null
+++ b/target/linux/rdc/files/arch/i386/mach-rdc/gpio.c
@@ -0,0 +1,91 @@
+/*
+ * Copyright (C) 2007, OpenWrt.org, Florian Fainelli <florian@openwrt.org>
+ * RDC321x architecture specific GPIO support
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ */
+
+#include <linux/autoconf.h>
+#include <linux/init.h>
+#include <linux/io.h>
+#include <linux/types.h>
+#include <linux/module.h>
+#include <linux/delay.h>
+
+#include <asm/mach-rdc/rdc321x_defs.h>
+
+static inline int rdc_gpio_is_valid(unsigned gpio)
+{
+ return (gpio <= RDC_MAX_GPIO);
+}
+
+static unsigned int rdc_gpio_read(unsigned gpio)
+{
+ unsigned int val;
+
+ val = 0x80000000 | (7 << 11) | ((gpio&0x20?0x84:0x48));
+ outl(val, RDC3210_CFGREG_ADDR);
+ udelay(10);
+ val = inl(RDC3210_CFGREG_DATA);
+ val |= (0x1 << (gpio & 0x1F));
+ outl(val, RDC3210_CFGREG_DATA);
+ udelay(10);
+ val = 0x80000000 | (7 << 11) | ((gpio&0x20?0x88:0x4C));
+ outl(val, RDC3210_CFGREG_ADDR);
+ udelay(10);
+ val = inl(RDC3210_CFGREG_DATA);
+
+ return val;
+}
+
+static void rdc_gpio_write(unsigned int val)
+{
+ if (val) {
+ outl(val, RDC3210_CFGREG_DATA);
+ udelay(10);
+ }
+}
+
+int rdc_gpio_get_value(unsigned gpio)
+{
+ if (rdc_gpio_is_valid(gpio))
+ return (int)rdc_gpio_read(gpio);
+ else
+ return -EINVAL;
+}
+EXPORT_SYMBOL(rdc_gpio_get_value);
+
+void rdc_gpio_set_value(unsigned gpio, int value)
+{
+ unsigned int val;
+
+ if (!rdc_gpio_is_valid(gpio))
+ return;
+
+ val = rdc_gpio_read(gpio);
+
+ if (value)
+ val &= ~(0x1 << (gpio & 0x1F));
+ else
+ val |= (0x1 << (gpio & 0x1F));
+
+ rdc_gpio_write(val);
+}
+EXPORT_SYMBOL(rdc_gpio_set_value);
+
+int rdc_gpio_direction_input(unsigned gpio)
+{
+ return 0;
+}
+EXPORT_SYMBOL(rdc_gpio_direction_input);
+
+int rdc_gpio_direction_output(unsigned gpio, int value)
+{
+ return 0;
+}
+EXPORT_SYMBOL(rdc_gpio_direction_output);
+
+
diff --git a/target/linux/rdc/files/arch/i386/mach-rdc/platform.c b/target/linux/rdc/files/arch/i386/mach-rdc/platform.c
new file mode 100644
index 0000000000..6809dcdd3f
--- /dev/null
+++ b/target/linux/rdc/files/arch/i386/mach-rdc/platform.c
@@ -0,0 +1,83 @@
+/*
+ * $Id: platform.c 8331 2007-08-03 15:59:23Z florian $
+ *
+ * Generic RDC321x platform devices
+ *
+ * Copyright (C) 2007 OpenWrt.org
+ * Copyright (C) 2007 Florian Fainelli <florian@openwrt.org>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the
+ * Free Software Foundation, Inc., 51 Franklin Street, Fifth Floor,
+ * Boston, MA 02110-1301, USA.
+ *
+ */
+
+#include <linux/init.h>
+#include <linux/kernel.h>
+#include <linux/list.h>
+#include <linux/device.h>
+#include <linux/platform_device.h>
+
+#include <asm/gpio.h>
+
+#define PFX "rdc321x: "
+
+/* FIXME : Flash */
+static struct resource rdc_flash_resource[] = {
+ [0] = {
+ .start = (u32)-CONFIG_MTD_RDC3210_SIZE,
+ .end = (u32)-1,
+ .flags = IORESOURCE_MEM,
+ },
+};
+
+static struct platform_device rdc_flash_device = {
+ .name = "rdc321x-flash",
+ .id = -1,
+ .num_resources = ARRAY_SIZE(rdc_flash_resource),
+ .resource = rdc_flash_resource,
+};
+
+/* LEDS */
+static struct platform_device rdc321x_leds = {
+ .name = "rdc321x-leds",
+ .id = -1,
+ .num_resources = 0,
+};
+
+static struct platform_device rdc321x_wdt = {
+ .name = "rdc321x-wdt",
+ .id = -1,
+ .num_resources = 0,
+};
+
+static int __init rdc_board_setup(void)
+{
+ int err;
+
+ err = platform_device_register(&rdc_flash_device);
+ if (err)
+ printk(KERN_ALERT PFX "failed to register flash\n");
+
+ err = platform_device_register(&rdc321x_leds);
+ if (err)
+ printk(KERN_ALERT PFX "failed to register LEDS\n");
+
+ err = platform_device_register(&rdc321x_wdt);
+ printk(KERN_ALERT PFX "failed to register watchdog\n");
+
+ return err;
+}
+
+arch_initcall(rdc_board_setup);
diff --git a/target/linux/rdc/files/arch/i386/mach-rdc/wdt.c b/target/linux/rdc/files/arch/i386/mach-rdc/wdt.c
new file mode 100644
index 0000000000..39956f35a7
--- /dev/null
+++ b/target/linux/rdc/files/arch/i386/mach-rdc/wdt.c
@@ -0,0 +1,272 @@
+/*
+ * RDC321x watchdog driver
+ *
+ * Copyright (C) 2007 Florian Fainelli <florian@openwrt.org>
+ *
+ * This driver is highly inspired from the cpu5_wdt driver
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ *
+ */
+
+#include <linux/module.h>
+#include <linux/moduleparam.h>
+#include <linux/types.h>
+#include <linux/errno.h>
+#include <linux/miscdevice.h>
+#include <linux/fs.h>
+#include <linux/init.h>
+#include <linux/ioport.h>
+#include <linux/timer.h>
+#include <linux/completion.h>
+#include <linux/jiffies.h>
+#include <linux/platform_device.h>
+#include <linux/watchdog.h>
+
+#include <asm/io.h>
+#include <asm/uaccess.h>
+
+#include <asm/mach-rdc/rdc321x_defs.h>
+
+#define RDC_WDT_MASK 0x80000000 /* Mask */
+#define RDC_WDT_EN 0x00800000 /* Enable bit */
+#define RDC_WDT_WTI 0x00200000 /* Generate a CPU reset/NMI/WDT irq when WDT timeout is reached */
+#define RDC_WDT_RST 0x00100000 /* Reset bit */
+#define RDC_WDT_WIF 0x00040000 /* WDT IRQ Flag */
+#define RDC_WDT_IRT 0x00000100 /* IRQ Routing table */
+#define RDC_WDT_CNT 0x00000001 /* WDT count */
+
+#define RDC_CLS_TMR 0x80003844 /* Clear timer */
+
+#define RDC_WDT_INTERVAL (HZ/10+1)
+
+int nowayout = WATCHDOG_NOWAYOUT;
+module_param(nowayout, int, 0);
+MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started (default=" __MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
+
+static int ticks = 1000;
+
+/* some device data */
+
+static struct {
+ struct completion stop;
+ volatile int running;
+ struct timer_list timer;
+ volatile int queue;
+ int default_ticks;
+ unsigned long inuse;
+} rdc321x_wdt_device;
+
+/* generic helper functions */
+
+static void rdc321x_wdt_trigger(unsigned long unused)
+{
+ if( rdc321x_wdt_device.running )
+ ticks--;
+
+ /* keep watchdog alive */
+ outl(RDC_WDT_EN|inl(RDC3210_CFGREG_DATA), RDC3210_CFGREG_DATA);
+
+ /* requeue?? */
+ if (rdc321x_wdt_device.queue && ticks)
+ mod_timer(&rdc321x_wdt_device.timer, jiffies + RDC_WDT_INTERVAL);
+ else {
+ /* ticks doesn't matter anyway */
+ complete(&rdc321x_wdt_device.stop);
+ }
+
+}
+
+static void rdc321x_wdt_reset(void)
+{
+ ticks = rdc321x_wdt_device.default_ticks;
+}
+
+static void rdc321x_wdt_start(void)
+{
+ if (!rdc321x_wdt_device.queue) {
+ rdc321x_wdt_device.queue = 1;
+
+ /* Clear the timer */
+ outl(RDC_CLS_TMR, RDC3210_CFGREG_ADDR);
+
+ /* Enable watchdog and set the timeout to 81.92 us */
+ outl(RDC_WDT_EN|RDC_WDT_CNT, RDC3210_CFGREG_DATA);
+
+ mod_timer(&rdc321x_wdt_device.timer, jiffies + RDC_WDT_INTERVAL);
+ }
+
+ /* if process dies, counter is not decremented */
+ rdc321x_wdt_device.running++;
+}
+
+static int rdc321x_wdt_stop(void)
+{
+ if (rdc321x_wdt_device.running)
+ rdc321x_wdt_device.running = 0;
+
+ ticks = rdc321x_wdt_device.default_ticks;
+
+ return -EIO;
+}
+
+/* filesystem operations */
+
+static int rdc321x_wdt_open(struct inode *inode, struct file *file)
+{
+ if (test_and_set_bit(0, &rdc321x_wdt_device.inuse))
+ return -EBUSY;
+
+ return nonseekable_open(inode, file);
+}
+
+static int rdc321x_wdt_release(struct inode *inode, struct file *file)
+{
+ clear_bit(0, &rdc321x_wdt_device.inuse);
+ return 0;
+}
+
+static int rdc321x_wdt_ioctl(struct inode *inode, struct file *file, unsigned int cmd, unsigned long arg)
+{
+ void __user *argp = (void __user *)arg;
+ unsigned int value;
+ static struct watchdog_info ident =
+ {
+ .options = WDIOF_CARDRESET,
+ .identity = "RDC321x WDT",
+ };
+
+ switch(cmd) {
+ case WDIOC_KEEPALIVE:
+ rdc321x_wdt_reset();
+ break;
+ case WDIOC_GETSTATUS:
+ /* Read the value from the DATA register */
+ value = inl(RDC3210_CFGREG_DATA);
+ if ( copy_to_user(argp, &value, sizeof(int)) )
+ return -EFAULT;
+ break;
+ case WDIOC_GETSUPPORT:
+ if ( copy_to_user(argp, &ident, sizeof(ident)) )
+ return -EFAULT;
+ break;
+ case WDIOC_SETOPTIONS:
+ if ( copy_from_user(&value, argp, sizeof(int)) )
+ return -EFAULT;
+ switch(value) {
+ case WDIOS_ENABLECARD:
+ rdc321x_wdt_start();
+ break;
+ case WDIOS_DISABLECARD:
+ return rdc321x_wdt_stop();
+ default:
+ return -EINVAL;
+ }
+ break;
+ default:
+ return -ENOTTY;
+ }
+ return 0;
+}
+
+static ssize_t rdc321x_wdt_write(struct file *file, const char __user *buf, size_t count, loff_t *ppos)
+{
+ if ( !count )
+ return -EIO;
+
+ rdc321x_wdt_reset();
+
+ return count;
+}
+
+static const struct file_operations rdc321x_wdt_fops = {
+ .owner = THIS_MODULE,
+ .llseek = no_llseek,
+ .ioctl = rdc321x_wdt_ioctl,
+ .open = rdc321x_wdt_open,
+ .write = rdc321x_wdt_write,
+ .release = rdc321x_wdt_release,
+};
+
+static struct miscdevice rdc321x_wdt_misc = {
+ .minor = WATCHDOG_MINOR,
+ .name = "watchdog",
+ .fops = &rdc321x_wdt_fops,
+};
+
+static int __devinit rdc321x_wdt_probe(struct platform_device *pdev)
+{
+ int err;
+
+ if ( (err = misc_register(&rdc321x_wdt_misc)) < 0 ) {
+ printk(KERN_ERR PFX "misc_register failed\n");
+ return err;
+ }
+
+ /* Reset the watchdog */
+ outl(RDC_WDT_RST, RDC3210_CFGREG_DATA);
+
+ init_completion(&rdc321x_wdt_device.stop);
+ rdc321x_wdt_device.queue = 0;
+
+ clear_bit(0, &rdc321x_wdt_device.inuse);
+
+ setup_timer(&rdc321x_wdt_device.timer, rdc321x_wdt_trigger, 0);
+
+ rdc321x_wdt_device.default_ticks = ticks;
+
+ printk(KERN_INFO PFX "init success\n");
+
+ return 0;
+}
+
+static int rdc321x_wdt_remove(struct platform_device *pdev)
+{
+ if (rdc321x_wdt_device.queue) {
+ rdc321x_wdt_device.queue = 0;
+ wait_for_completion(&rdc321x_wdt_device.stop);
+ }
+
+ misc_deregister(&rdc321x_wdt_misc);
+
+ return 0;
+}
+
+static struct platform_driver rdc321x_wdt_driver = {
+ .probe = rdc321x_wdt_probe,
+ .remove = rdc321x_wdt_remove,
+ .driver = {
+ .owner = THIS_MODULE,
+ .name = "rdc321x_wdt",
+ },
+};
+
+static int __init rdc321x_wdt_init(void)
+{
+ return platform_driver_register(&rdc321x_wdt_driver);
+}
+
+static void __exit rdc321x_wdt_exit(void)
+{
+ platform_driver_unregister(&rdc321x_wdt_driver);
+}
+
+module_init(rdc321x_wdt_init);
+module_exit(rdc321x_wdt_exit);
+
+MODULE_AUTHOR("Florian Fainelli <florian@openwrt.org>");
+MODULE_DESCRIPTION("RDC321x watchdog driver");
+MODULE_LICENSE("GPL");
+MODULE_ALIAS_MISCDEV(WATCHDOG_MINOR);
diff --git a/target/linux/rdc/files/drivers/leds/leds-rdc3211.c b/target/linux/rdc/files/drivers/leds/leds-rdc3211.c
new file mode 100644
index 0000000000..ae068af14f
--- /dev/null
+++ b/target/linux/rdc/files/drivers/leds/leds-rdc3211.c
@@ -0,0 +1,71 @@
+/*
+ * LED driver for RDC3211 boards
+ *
+ * Copyright 2007 Florian Fainelli <florian@openwrt.org>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ */
+
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/init.h>
+#include <linux/platform_device.h>
+#include <linux/leds.h>
+#include <linux/err.h>
+
+#include <asm/gpio.h>
+
+static void rdc321x_led_set(struct led_classdev *led_cdev, enum led_brightness brightness)
+{
+ gpio_set_value(1, brightness ? 1 : 0);
+}
+
+/* The DMZ led is at GPIO line 1 */
+static struct led_classdev rdc321x_dmz_led = {
+ .name = "rdc321x:dmz",
+ .brightness_set = rdc321x_led_set,
+};
+
+static int rdc321x_leds_probe(struct platform_device *pdev)
+{
+ return led_classdev_register(&pdev->dev, &rdc321x_dmz_led);
+}
+
+static int rdc321x_leds_remove(struct platform_device *pdev)
+{
+ led_classdev_unregister(&rdc321x_dmz_led);
+ return 0;
+}
+
+static struct platform_driver rdc321x_leds_driver = {
+ .probe = rdc321x_leds_probe,
+ .remove = rdc321x_leds_remove,
+ .driver = {
+ .name = "rdc321x-leds",
+ .owner = THIS_MODULE,
+ }
+};
+
+static int __init rdc321x_leds_init(void)
+{
+ int ret;
+
+ ret = platform_driver_register(&rdc321x_leds_driver);
+
+ return ret;
+}
+
+static void __exit rdc321x_leds_exit(void)
+{
+ platform_driver_unregister(&rdc321x_leds_driver);
+}
+
+module_init(rdc321x_leds_init);
+module_exit(rdc321x_leds_exit);
+
+MODULE_AUTHOR("Florian Fainelli <florian@openwrt.org>");
+MODULE_DESCRIPTION("RDC321x LED driver");
+MODULE_LICENSE("GPL");
diff --git a/target/linux/rdc/files/drivers/mtd/maps/imghdr.h b/target/linux/rdc/files/drivers/mtd/maps/imghdr.h
new file mode 100644
index 0000000000..7232b70615
--- /dev/null
+++ b/target/linux/rdc/files/drivers/mtd/maps/imghdr.h
@@ -0,0 +1,25 @@
+#ifndef GT_IMGHDR_H
+#define GT_IMGHDR_H
+
+#define GTIMG_MAGIC "GMTK"
+
+/* Product ID */
+#define PID_RTL_AIRGO 1
+#define PID_RTL_RALINK 2
+#define PID_RDC_AIRGO 3
+#define PID_RDC_RALINK 5 /* White Lable */
+
+/* Gemtek */
+typedef struct
+{
+ u8 magic[4]; /* ASICII: GMTK */
+ u32 checksum; /* CRC32 */
+ u32 version; /* x.x.x.x */
+ u32 kernelsz; /* The size of the kernel image */
+ u32 imagesz; /* The length of this image file ( kernel + romfs + this header) */
+ u32 pid; /* Product ID */
+ u32 fastcksum; /* Partial CRC32 on (First(256), medium(256), last(512)) */
+ u32 reserved;
+}gt_imghdr_t;
+
+#endif
diff --git a/target/linux/rdc/files/drivers/mtd/maps/rdc3210.c b/target/linux/rdc/files/drivers/mtd/maps/rdc3210.c
new file mode 100644
index 0000000000..fb2a3f854f
--- /dev/null
+++ b/target/linux/rdc/files/drivers/mtd/maps/rdc3210.c
@@ -0,0 +1,379 @@
+/*******************************************************************
+ * Simple Flash mapping for RDC3210 *
+ * *
+ * 2005.03.23 *
+ * Dante Su (dante_su@gemtek.com.tw) *
+ * Copyright (C) 2005 Gemtek Corporation *
+ *******************************************************************/
+
+#include <linux/module.h>
+#include <linux/types.h>
+#include <linux/kernel.h>
+#include <asm/io.h>
+#include <linux/mtd/mtd.h>
+#include <linux/mtd/map.h>
+#include <linux/mtd/partitions.h>
+#include <linux/autoconf.h>
+#include <linux/sched.h>
+#include <linux/squashfs_fs.h>
+
+static struct mtd_info *rdc3210_mtd;
+
+struct map_info rdc3210_map =
+{
+ .name = "RDC3210 Flash",
+ .size = CONFIG_MTD_RDC3210_SIZE,
+ .bankwidth = CONFIG_MTD_RDC3210_BUSWIDTH,
+};
+
+/* Dante: This is the default static mapping, however this is nothing but a hint. (Say dynamic mapping) */
+static struct mtd_partition rdc3210_parts[] =
+{
+#if CONFIG_MTD_RDC3210_SIZE == 0x400000
+ { name: "linux", offset: 0, size: 0x003C0000 }, /* 3840 KB = (Kernel + ROMFS) = (768 KB + 3072 KB) */
+ { name: "romfs", offset: 0x000C0000, size: 0x00300000 }, /* 3072 KB */
+ { name: "nvram", offset: 0x003C0000, size: 0x00010000 }, /* 64 KB */
+#ifdef CONFIG_MTD_RDC3210_FACTORY_PRESENT
+ { name: "factory", offset: 0x003D0000, size: 0x00010000 }, /* 64 KB */
+#endif
+ { name: "bootldr", offset: 0x003E0000, size: 0x00020000 }, /* 128 KB */
+#elif CONFIG_MTD_RDC3210_SIZE == 0x200000
+ { name: "linux", offset: 0x00008000, size: 0x001E8000 },
+ { name: "romfs", offset: 0x000C8000, size: 0x00128000 },
+ { name: "nvram", offset: 0x00000000, size: 0x00008000 }, /* 64 KB */
+#ifdef CONFIG_MTD_RDC3210_FACTORY_PRESENT
+#error Unsupported configuration!
+#endif
+ { name: "bootldr", offset: 0x001F0000, size: 0x00010000 },
+#else
+#error Unsupported configuration!
+#endif
+};
+
+static __u32 crctab[257] = {
+ 0x00000000, 0x77073096, 0xee0e612c, 0x990951ba,
+ 0x076dc419, 0x706af48f, 0xe963a535, 0x9e6495a3,
+ 0x0edb8832, 0x79dcb8a4, 0xe0d5e91e, 0x97d2d988,
+ 0x09b64c2b, 0x7eb17cbd, 0xe7b82d07, 0x90bf1d91,
+ 0x1db71064, 0x6ab020f2, 0xf3b97148, 0x84be41de,
+ 0x1adad47d, 0x6ddde4eb, 0xf4d4b551, 0x83d385c7,
+ 0x136c9856, 0x646ba8c0, 0xfd62f97a, 0x8a65c9ec,
+ 0x14015c4f, 0x63066cd9, 0xfa0f3d63, 0x8d080df5,
+ 0x3b6e20c8, 0x4c69105e, 0xd56041e4, 0xa2677172,
+ 0x3c03e4d1, 0x4b04d447, 0xd20d85fd, 0xa50ab56b,
+ 0x35b5a8fa, 0x42b2986c, 0xdbbbc9d6, 0xacbcf940,
+ 0x32d86ce3, 0x45df5c75, 0xdcd60dcf, 0xabd13d59,
+ 0x26d930ac, 0x51de003a, 0xc8d75180, 0xbfd06116,
+ 0x21b4f4b5, 0x56b3c423, 0xcfba9599, 0xb8bda50f,
+ 0x2802b89e, 0x5f058808, 0xc60cd9b2, 0xb10be924,
+ 0x2f6f7c87, 0x58684c11, 0xc1611dab, 0xb6662d3d,
+ 0x76dc4190, 0x01db7106, 0x98d220bc, 0xefd5102a,
+ 0x71b18589, 0x06b6b51f, 0x9fbfe4a5, 0xe8b8d433,
+ 0x7807c9a2, 0x0f00f934, 0x9609a88e, 0xe10e9818,
+ 0x7f6a0dbb, 0x086d3d2d, 0x91646c97, 0xe6635c01,
+ 0x6b6b51f4, 0x1c6c6162, 0x856530d8, 0xf262004e,
+ 0x6c0695ed, 0x1b01a57b, 0x8208f4c1, 0xf50fc457,
+ 0x65b0d9c6, 0x12b7e950, 0x8bbeb8ea, 0xfcb9887c,
+ 0x62dd1ddf, 0x15da2d49, 0x8cd37cf3, 0xfbd44c65,
+ 0x4db26158, 0x3ab551ce, 0xa3bc0074, 0xd4bb30e2,
+ 0x4adfa541, 0x3dd895d7, 0xa4d1c46d, 0xd3d6f4fb,
+ 0x4369e96a, 0x346ed9fc, 0xad678846, 0xda60b8d0,
+ 0x44042d73, 0x33031de5, 0xaa0a4c5f, 0xdd0d7cc9,
+ 0x5005713c, 0x270241aa, 0xbe0b1010, 0xc90c2086,
+ 0x5768b525, 0x206f85b3, 0xb966d409, 0xce61e49f,
+ 0x5edef90e, 0x29d9c998, 0xb0d09822, 0xc7d7a8b4,
+ 0x59b33d17, 0x2eb40d81, 0xb7bd5c3b, 0xc0ba6cad,
+ 0xedb88320, 0x9abfb3b6, 0x03b6e20c, 0x74b1d29a,
+ 0xead54739, 0x9dd277af, 0x04db2615, 0x73dc1683,
+ 0xe3630b12, 0x94643b84, 0x0d6d6a3e, 0x7a6a5aa8,
+ 0xe40ecf0b, 0x9309ff9d, 0x0a00ae27, 0x7d079eb1,
+ 0xf00f9344, 0x8708a3d2, 0x1e01f268, 0x6906c2fe,
+ 0xf762575d, 0x806567cb, 0x196c3671, 0x6e6b06e7,
+ 0xfed41b76, 0x89d32be0, 0x10da7a5a, 0x67dd4acc,
+ 0xf9b9df6f, 0x8ebeeff9, 0x17b7be43, 0x60b08ed5,
+ 0xd6d6a3e8, 0xa1d1937e, 0x38d8c2c4, 0x4fdff252,
+ 0xd1bb67f1, 0xa6bc5767, 0x3fb506dd, 0x48b2364b,
+ 0xd80d2bda, 0xaf0a1b4c, 0x36034af6, 0x41047a60,
+ 0xdf60efc3, 0xa867df55, 0x316e8eef, 0x4669be79,
+ 0xcb61b38c, 0xbc66831a, 0x256fd2a0, 0x5268e236,
+ 0xcc0c7795, 0xbb0b4703, 0x220216b9, 0x5505262f,
+ 0xc5ba3bbe, 0xb2bd0b28, 0x2bb45a92, 0x5cb36a04,
+ 0xc2d7ffa7, 0xb5d0cf31, 0x2cd99e8b, 0x5bdeae1d,
+ 0x9b64c2b0, 0xec63f226, 0x756aa39c, 0x026d930a,
+ 0x9c0906a9, 0xeb0e363f, 0x72076785, 0x05005713,
+ 0x95bf4a82, 0xe2b87a14, 0x7bb12bae, 0x0cb61b38,
+ 0x92d28e9b, 0xe5d5be0d, 0x7cdcefb7, 0x0bdbdf21,
+ 0x86d3d2d4, 0xf1d4e242, 0x68ddb3f8, 0x1fda836e,
+ 0x81be16cd, 0xf6b9265b, 0x6fb077e1, 0x18b74777,
+ 0x88085ae6, 0xff0f6a70, 0x66063bca, 0x11010b5c,
+ 0x8f659eff, 0xf862ae69, 0x616bffd3, 0x166ccf45,
+ 0xa00ae278, 0xd70dd2ee, 0x4e048354, 0x3903b3c2,
+ 0xa7672661, 0xd06016f7, 0x4969474d, 0x3e6e77db,
+ 0xaed16a4a, 0xd9d65adc, 0x40df0b66, 0x37d83bf0,
+ 0xa9bcae53, 0xdebb9ec5, 0x47b2cf7f, 0x30b5ffe9,
+ 0xbdbdf21c, 0xcabac28a, 0x53b39330, 0x24b4a3a6,
+ 0xbad03605, 0xcdd70693, 0x54de5729, 0x23d967bf,
+ 0xb3667a2e, 0xc4614ab8, 0x5d681b02, 0x2a6f2b94,
+ 0xb40bbe37, 0xc30c8ea1, 0x5a05df1b, 0x2d02ef8d,
+ 0
+};
+
+static __u32 crc32(__u8 * buf, __u32 len)
+{
+ register int i;
+ __u32 sum;
+ register __u32 s0;
+ s0 = ~0;
+ for (i = 0; i < len; i++) {
+ s0 = (s0 >> 8) ^ crctab[(__u8) (s0 & 0xFF) ^ buf[i]];
+ }
+ sum = ~s0;
+ return sum;
+}
+
+static void erase_callback(struct erase_info *done)
+{
+ wait_queue_head_t *wait_q = (wait_queue_head_t *)done->priv;
+ wake_up(wait_q);
+}
+
+static int erase_write (struct mtd_info *mtd, unsigned long pos,
+ int len, const char *buf)
+{
+ struct erase_info erase;
+ DECLARE_WAITQUEUE(wait, current);
+ wait_queue_head_t wait_q;
+ size_t retlen;
+ int ret;
+
+ /*
+ * First, let's erase the flash block.
+ */
+
+ init_waitqueue_head(&wait_q);
+ erase.mtd = mtd;
+ erase.callback = erase_callback;
+ erase.addr = pos;
+ erase.len = len;
+ erase.priv = (u_long)&wait_q;
+
+ set_current_state(TASK_INTERRUPTIBLE);
+ add_wait_queue(&wait_q, &wait);
+
+ ret = mtd->erase(mtd, &erase);
+ if (ret) {
+ set_current_state(TASK_RUNNING);
+ remove_wait_queue(&wait_q, &wait);
+ printk (KERN_WARNING "erase of region [0x%lx, 0x%x] "
+ "on \"%s\" failed\n",
+ pos, len, mtd->name);
+ return ret;
+ }
+
+ schedule(); /* Wait for erase to finish. */
+ remove_wait_queue(&wait_q, &wait);
+
+ /*
+ * Next, writhe data to flash.
+ */
+
+ ret = mtd->write (mtd, pos, len, &retlen, buf);
+ if (ret)
+ return ret;
+ if (retlen != len)
+ return -EIO;
+ return 0;
+}
+
+static int __init init_rdc3210_map(void)
+{
+ rdc3210_map.phys = -rdc3210_map.size;
+ printk(KERN_NOTICE "flash device: %x at %x\n", rdc3210_map.size, rdc3210_map.phys);
+
+ rdc3210_map.map_priv_1 = (unsigned long)(rdc3210_map.virt = ioremap_nocache(rdc3210_map.phys, rdc3210_map.size));
+
+ if (!rdc3210_map.map_priv_1)
+ {
+ printk("Failed to ioremap\n");
+ return -EIO;
+ }
+ rdc3210_mtd = do_map_probe("cfi_probe", &rdc3210_map);
+#ifdef CONFIG_MTD_RDC3210_STATIC_MAP /* Dante: This is for fixed map */
+ if (rdc3210_mtd)
+ {
+ rdc3210_mtd->module = THIS_MODULE;
+ add_mtd_partitions(rdc3210_mtd, rdc3210_parts, sizeof(rdc3210_parts)/sizeof(rdc3210_parts[0]));
+ return 0;
+ }
+#else /* Dante: This is for dynamic mapping */
+
+#include "imghdr.h"
+
+ typedef struct {
+ u8 magic[4];
+ u32 kernelsz, ramdisksz;
+ u8 magic2[4];
+ u32 sz2;
+ }sc_imghdr_t;
+
+ if (rdc3210_mtd)
+ { // Dante
+ sc_imghdr_t *hdr2= (sc_imghdr_t *)(rdc3210_map.map_priv_1);
+ gt_imghdr_t *hdr = (gt_imghdr_t *)hdr2
+#ifdef CONFIG_MTD_RDC3210_ALLOW_JFFS2
+ , *ptmp
+#endif
+ ;
+ int len, tmp, tmp2, tmp3, tmp4, hdr_type = 0;
+
+ if(!memcmp(hdr->magic, GTIMG_MAGIC, 4))
+ {
+ hdr_type = 1;
+ tmp = hdr->kernelsz + sizeof(gt_imghdr_t);
+ tmp2 = rdc3210_mtd->erasesize;
+ tmp3 = ((tmp / 32) + ((tmp % 32) ? 1 : 0)) * 32;
+ tmp4 = ((tmp / tmp2) + ((tmp % tmp2) ? 1 : 0)) * tmp2;
+ }
+#ifndef CONFIG_MTD_RDC3210_ALLOW_JFFS2
+ else if (!memcmp(hdr2->magic, "CSYS", 4))
+ {
+ hdr_type = 2;
+ tmp = hdr2->ramdisksz + hdr2->kernelsz + sizeof(sc_imghdr_t);
+ tmp2 = rdc3210_mtd->erasesize;
+ tmp3 = ((tmp / 32) + ((tmp % 32) ? 1 : 0)) * 32;
+ tmp4 = ((tmp / tmp2) + ((tmp % tmp2) ? 1 : 0)) * tmp2;
+ }
+#endif
+ else
+ {
+ iounmap((void *)rdc3210_map.map_priv_1);
+ rdc3210_map.map_priv_1 = 0L;
+ rdc3210_map.virt = NULL;
+ printk("Invalid MAGIC for Firmware Image!!!\n");
+ return -EIO;
+ }
+#ifdef CONFIG_MTD_RDC3210_ALLOW_JFFS2
+ tmp = (tmp3 == tmp4) ? tmp4 + tmp2 : tmp4;
+ if ((ptmp = (gt_imghdr_t *)vmalloc(tmp)) == NULL)
+ {
+ iounmap((void *)rdc3210_map.map_priv_1);
+ rdc3210_map.map_priv_1 = 0L;
+ rdc3210_map.virt = NULL;
+ printk("Can't allocate 0x%08x for flash-reading buffer!\n", tmp);
+ return -ENOMEM;
+ }
+ if (rdc3210_mtd->read(rdc3210_mtd, 0, tmp, &len, (__u8 *)ptmp) || len != tmp)
+ {
+ vfree(ptmp);
+ iounmap((void *)rdc3210_map.map_priv_1);
+ rdc3210_map.map_priv_1 = 0L;
+ rdc3210_map.virt = NULL;
+ printk("Can't read that much flash! Read 0x%08x of it.\n", len);
+ return -EIO;
+ }
+#endif
+#ifdef CONFIG_MTD_RDC3210_FACTORY_PRESENT
+ /* 1. Adjust Redboot */
+ tmp = rdc3210_mtd->size - rdc3210_parts[4].size;
+ rdc3210_parts[4].offset = tmp - (tmp % tmp2);
+ rdc3210_parts[4].size = rdc3210_mtd->size - rdc3210_parts[4].offset;
+
+ /* 2. Adjust Factory Default */
+ tmp -= rdc3210_parts[3].size;
+ rdc3210_parts[3].offset = tmp - (tmp % tmp2);
+ rdc3210_parts[3].size = rdc3210_parts[4].offset - rdc3210_parts[3].offset;
+#else
+ /* 1. Adjust Redboot */
+ tmp = rdc3210_mtd->size - rdc3210_parts[3].size;
+ rdc3210_parts[3].offset = tmp - (tmp % tmp2);
+ rdc3210_parts[3].size = rdc3210_mtd->size - rdc3210_parts[3].offset;
+#endif
+ if (hdr_type == 1) {
+ /* 3. Adjust NVRAM */
+#ifdef CONFIG_MTD_RDC3210_ALLOW_JFFS2
+ if (*(__u32 *)(((unsigned char *)ptmp)+tmp3) == SQUASHFS_MAGIC)
+ {
+ len = 1;
+ tmp4 = tmp3;
+ tmp = hdr->imagesz;
+ rdc3210_parts[2].name = "rootfs_data";
+ rdc3210_parts[2].offset = rdc3210_parts[0].offset + (((tmp / tmp2) + ((tmp % tmp2) ? 1 : 0)) * tmp2);
+ }
+ else
+#else
+ tmp4 = tmp3;
+#endif
+ {
+ len = 0;
+ tmp -= rdc3210_parts[2].size;
+ rdc3210_parts[2].offset = tmp - (tmp % tmp2);
+ }
+ rdc3210_parts[2].size = rdc3210_parts[3].offset - rdc3210_parts[2].offset;
+ }
+ else if (hdr_type == 2)
+ {
+ len = 0;
+ tmp4 = tmp3;
+ }
+
+ /* 4. Adjust Linux (Kernel + ROMFS) */
+ rdc3210_parts[0].size = rdc3210_parts[len + hdr_type + 1].offset - rdc3210_parts[0].offset;
+
+ /* 5. Adjust ROMFS */
+ rdc3210_parts[1].offset = rdc3210_parts[0].offset + tmp4;
+ rdc3210_parts[1].size = rdc3210_parts[hdr_type + 1].offset - rdc3210_parts[1].offset;
+#ifdef CONFIG_MTD_RDC3210_ALLOW_JFFS2
+ if (!(hdr->reserved || len))
+ {
+ __u8 buf[1024];
+ ptmp->reserved = hdr->imagesz;
+ ptmp->imagesz = tmp4;
+ ptmp->checksum = ptmp->fastcksum = 0;
+ memcpy(buf, ptmp, 0x100);
+ memcpy(buf + 0x100, ((__u8 *)ptmp) + ((tmp4 >> 1) - ((tmp4 & 0x6) >> 1)), 0x100);
+ memcpy(buf + 0x200, ((__u8 *)ptmp) + (tmp4 - 0x200), 0x200);
+ ptmp->fastcksum = crc32(buf, sizeof(buf));
+ ptmp->checksum = crc32((__u8 *)ptmp, tmp4);
+ if (rdc3210_mtd->unlock) rdc3210_mtd->unlock(rdc3210_mtd, 0, tmp2);
+ if ((len = erase_write(rdc3210_mtd, 0, tmp2, (char *)ptmp)))
+ {
+ vfree(ptmp);
+ iounmap((void *)rdc3210_map.map_priv_1);
+ rdc3210_map.map_priv_1 = 0L;
+ rdc3210_map.virt = NULL;
+ printk("Couldn't erase! Got %d.\n", len);
+ return len;
+ }
+ if (rdc3210_mtd->sync) rdc3210_mtd->sync(rdc3210_mtd);
+ }
+ vfree(ptmp);
+#endif
+ rdc3210_mtd->owner = THIS_MODULE;
+ add_mtd_partitions(rdc3210_mtd, rdc3210_parts, sizeof(rdc3210_parts)/sizeof(rdc3210_parts[0]));
+ return 0;
+ }
+#endif
+ iounmap((void *)rdc3210_map.map_priv_1);
+ rdc3210_map.map_priv_1 = 0L;
+ rdc3210_map.virt = NULL;
+ return -ENXIO;
+}
+
+static void __exit cleanup_rdc3210_map(void)
+{
+ if (rdc3210_mtd)
+ {
+ del_mtd_partitions(rdc3210_mtd);
+ map_destroy(rdc3210_mtd);
+ }
+
+ if (rdc3210_map.map_priv_1)
+ {
+ iounmap((void *)rdc3210_map.map_priv_1);
+ rdc3210_map.map_priv_1 = 0L;
+ rdc3210_map.virt = NULL;
+ }
+}
+
+module_init(init_rdc3210_map);
+module_exit(cleanup_rdc3210_map);
diff --git a/target/linux/rdc/files/drivers/net/r6040.c b/target/linux/rdc/files/drivers/net/r6040.c
new file mode 100644
index 0000000000..376b6ecfe9
--- /dev/null
+++ b/target/linux/rdc/files/drivers/net/r6040.c
@@ -0,0 +1,1041 @@
+/* r6040.c: A RDC R6040 FastEthernet driver for linux. */
+/*
+ Re-written 2004 by Sten Wang.
+
+ Copyright 1994-2000 by Donald Becker.
+ Copyright 1993 United States Government as represented by the
+ Director, National Security Agency. This software may be used and
+ distributed according to the terms of the GNU General Public License,
+ incorporated herein by reference.
+
+ This driver is for RDC R6040 FastEthernet MAC series.
+ For kernel version after 2.4.22
+
+ Modification List
+ ---------- ------------------------------------------------
+ 08-24-2006 Support at linux 2.6.10 above
+ 03-24-2006 Support NAPI
+ 03-21-2006 By Charies,change spin_lock_irqsave(lp->lock, flags) to
+ spin_lock_irqsave(&lp->lock, flags) in set_multicast_list
+ 03-15-2006 Modify the set_multicast_list ,due to when re-plug the ethernet,
+ it will forget the previous setting
+ 07-12-2005 Tim, modify the set_multicast_list
+ 03-28-2005 Tim, modify some error mac register offset in
+ function set_multicast_list
+ 03-27-2005 Tim, Add the internal state machine reset
+ Sten, If multicast address more than 4, enter PROM mode
+ Changed rdc to r6040
+ 12-22-2004 Sten Init MAC MBCR register=0x012A
+ PHY_CAP = 0x01E1
+
+ Need to Do LIst:
+ 1. If multicast address more than 4, use the multicast address hash
+*/
+
+#define DRV_NAME "r6040"
+#define DRV_VERSION "0.13"
+#define DRV_RELDATE "24Aug2006"
+
+/* PHY CHIP Address */
+#define PHY1_ADDR 1 /* For MAC1 */
+#define PHY2_ADDR 2 /* For MAC2 */
+#define PHY_MODE 0x3100 /* PHY CHIP Register 0 */
+#define PHY_CAP 0x01E1 /* PHY CHIP Register 4 */
+
+/* Time in jiffies before concluding the transmitter is hung. */
+#define TX_TIMEOUT (6000 * HZ / 1000)
+#define TIMER_WUT (jiffies + HZ * 1)/* timer wakeup time : 1 second */
+
+/* RDC MAC ID */
+#define RDC_MAC_ID 0x6040
+
+/* RDC MAC I/O Size */
+#define R6040_IO_SIZE 256
+
+/* RDC Chip PCI Command */
+#define R6040_PCI_CMD 0x0005 /* IO, Master */
+
+/* MAX RDC MAC */
+#define MAX_MAC 2
+
+/* MAC setting */
+#define TX_DCNT 0x80 /* TX descriptor count */
+#define RX_DCNT 0x80 /* RX descriptor count */
+#define MAX_BUF_SIZE 0x600
+#define ALLOC_DESC_SIZE ((TX_DCNT+RX_DCNT)*sizeof(struct r6040_descriptor)+0x10)
+#define MBCR_DEFAULT 0x012A /* MAC Bus Control Register */
+
+/* Debug enable or not */
+#define RDC_DEBUG 0
+
+#if RDC_DEBUG > 1
+#define RDC_DBUG(msg, value) printk("%s %x\n", msg, value);
+#else
+#define RDC_DBUG(msg, value)
+#endif
+
+
+#include <linux/module.h>
+#include <linux/version.h>
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 0)
+#include <linux/moduleparam.h>
+#endif
+#include <linux/kernel.h>
+#include <linux/string.h>
+#include <linux/timer.h>
+#include <linux/errno.h>
+#include <linux/ioport.h>
+#include <linux/slab.h>
+#include <linux/interrupt.h>
+#include <linux/pci.h>
+#include <linux/netdevice.h>
+#include <linux/etherdevice.h>
+#include <linux/skbuff.h>
+#include <linux/init.h>
+#include <linux/delay.h> /* for udelay() */
+#include <linux/mii.h>
+#include <linux/ethtool.h>
+#include <linux/crc32.h>
+#include <linux/spinlock.h>
+
+#include <asm/processor.h>
+#include <asm/bitops.h>
+#include <asm/io.h>
+#include <asm/irq.h>
+#include <asm/uaccess.h>
+
+MODULE_AUTHOR("Sten Wang <sten.wang@rdc.com.tw>");
+MODULE_LICENSE("GPL");
+#ifdef CONFIG_R6040_NAPI
+MODULE_DESCRIPTION("RDC R6040 NAPI PCI FastEthernet Driver");
+#else
+MODULE_DESCRIPTION("RDC R6040 PCI FastEthernet Driver");
+#endif
+
+#define R6040_INT_MASK 0x0011
+
+struct r6040_descriptor {
+ u16 status, len; /* 0-3 */
+ u32 buf; /* 4-7 */
+ u32 ndesc; /* 8-B */
+ u32 rev1; /* C-F */
+ char *vbufp; /* 10-13 */
+ struct r6040_descriptor *vndescp; /* 14-17 */
+ struct sk_buff *skb_ptr; /* 18-1B */
+ u32 rev2; /* 1C-1F */
+} __attribute__(( aligned(32) ));
+
+struct r6040_private {
+ struct net_device_stats stats;
+ spinlock_t lock;
+ struct timer_list timer;
+ struct pci_dev *pdev;
+
+ struct r6040_descriptor *rx_insert_ptr;
+ struct r6040_descriptor *rx_remove_ptr;
+ struct r6040_descriptor *tx_insert_ptr;
+ struct r6040_descriptor *tx_remove_ptr;
+ u16 tx_free_desc, rx_free_desc, phy_addr, phy_mode;
+ u16 mcr0, mcr1;
+ dma_addr_t desc_dma;
+ char *desc_pool;
+ u16 switch_sig;
+};
+
+struct r6040_chip_info {
+ const char *name;
+ u16 pci_flags;
+ int io_size;
+ int drv_flags;
+};
+
+#ifdef CONFIG_R6040_NAPI
+static int NAPI_status;
+#endif
+
+static int __devinitdata printed_version;
+#ifdef CONFIG_R6040_NAPI
+static char version[] __devinitdata =
+ KERN_INFO DRV_NAME ": RDC R6040 NAPI net driver, version "DRV_VERSION " (" DRV_RELDATE ")\n";
+#else
+static char version[] __devinitdata =
+ KERN_INFO DRV_NAME ": RDC R6040 net driver, version "DRV_VERSION " (" DRV_RELDATE ")\n";
+#endif
+static struct r6040_chip_info r6040_chip_info[] __devinitdata =
+{
+ { "RDC R6040 Knight", R6040_PCI_CMD, R6040_IO_SIZE, 0}
+};
+static char *parent = NULL;
+
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 0)
+static int NUM_MAC_TABLE = 2 ;
+module_param(parent, charp, 0444);
+#else
+MODULE_PARM(parent, "s");
+#endif
+MODULE_PARM_DESC(parent, "Parent network device name");
+
+static int phy_table[] = { 0x1, 0x2};
+static u8 adr_table[2][8] = {{0x00, 0x00, 0x60, 0x00, 0x00, 0x01}, {0x00, 0x00, 0x60, 0x00, 0x00, 0x02}};
+
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 10)
+ module_param_array(adr_table, int, &NUM_MAC_TABLE, 0644);
+#elif LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 0)
+ module_param_array(adr_table, int, NUM_MAC_TABLE, 0644);
+#else
+ MODULE_PARM(adr_table, "2-4i");
+#endif
+MODULE_PARM_DESC(adr_table, "MAC Address (assigned)");
+
+static int r6040_open(struct net_device *dev);
+static int r6040_start_xmit(struct sk_buff *skb, struct net_device *dev);
+static irqreturn_t r6040_interrupt(int irq, void *dev_id);
+static struct net_device_stats *r6040_get_stats(struct net_device *dev);
+static int r6040_close(struct net_device *dev);
+static void set_multicast_list(struct net_device *dev);
+static struct ethtool_ops netdev_ethtool_ops;
+static int netdev_ioctl (struct net_device *dev, struct ifreq *rq, int cmd);
+static void r6040_down(struct net_device *dev);
+static void r6040_up(struct net_device *dev);
+static void r6040_tx_timeout (struct net_device *dev);
+static void r6040_timer(unsigned long);
+
+static int phy_mode_chk(struct net_device *dev);
+static int phy_read(int ioaddr, int phy_adr, int reg_idx);
+static void phy_write(int ioaddr, int phy_adr, int reg_idx, int dat);
+static void rx_buf_alloc(struct r6040_private *lp,struct net_device *dev);
+#ifdef CONFIG_R6040_NAPI
+static int r6040_poll(struct net_device *netdev, int *budget);
+#endif
+
+
+static int __devinit r6040_init_one (struct pci_dev *pdev,
+ const struct pci_device_id *ent)
+{
+ struct net_device *dev;
+ struct r6040_private *lp;
+ int ioaddr, io_size, err;
+ static int card_idx = -1;
+ int chip_id = (int)ent->driver_data;
+
+ RDC_DBUG("r6040_init_one()", 0);
+
+ if (printed_version++)
+ printk(version);
+
+ if ((err = pci_enable_device (pdev)))
+ return err;
+
+ /* this should always be supported */
+ if (pci_set_dma_mask(pdev, 0xffffffff)) {
+ printk(KERN_ERR DRV_NAME "32-bit PCI DMA addresses not supported by the card!?\n");
+ return -ENODEV;
+ }
+
+ /* IO Size check */
+ io_size = r6040_chip_info[chip_id].io_size;
+ if (pci_resource_len (pdev, 0) < io_size) {
+ return -ENODEV;
+ }
+
+ ioaddr = pci_resource_start (pdev, 0); /* IO map base address */
+ pci_set_master(pdev);
+
+ dev = alloc_etherdev(sizeof(struct r6040_private));
+ if (dev == NULL)
+ return -ENOMEM;
+ SET_MODULE_OWNER(dev);
+
+ if (pci_request_regions(pdev, DRV_NAME)) {
+ printk(KERN_ERR DRV_NAME ": Failed to request PCI regions\n");
+ err = -ENODEV;
+ goto err_out_disable;
+ }
+
+ /* Init system & device */
+ lp = dev->priv;
+ dev->base_addr = ioaddr;
+ dev->irq = pdev->irq;
+
+ spin_lock_init(&lp->lock);
+ pci_set_drvdata(pdev, dev);
+
+ /* Set MAC address */
+ card_idx++;
+ memcpy(dev->dev_addr, (u8 *)&adr_table[card_idx][0], 6);
+
+ /* Link new device into r6040_root_dev */
+ lp->pdev = pdev;
+
+ /* Init RDC private data */
+ lp->mcr0 = 0x1002;
+ lp->phy_addr = phy_table[card_idx];
+ lp->switch_sig = 0;
+
+ /* The RDC-specific entries in the device structure. */
+ dev->open = &r6040_open;
+ dev->hard_start_xmit = &r6040_start_xmit;
+ dev->stop = &r6040_close;
+ dev->get_stats = &r6040_get_stats;
+ dev->set_multicast_list = &set_multicast_list;
+ dev->do_ioctl = &netdev_ioctl;
+ dev->ethtool_ops = &netdev_ethtool_ops;
+ dev->tx_timeout = &r6040_tx_timeout;
+ dev->watchdog_timeo = TX_TIMEOUT;
+#ifdef CONFIG_R6040_NAPI
+ dev->poll = &r6040_poll;
+ dev->weight = 64;
+#endif
+
+ /* Register net device. After this dev->name assign */
+ if ((err = register_netdev(dev))) {
+ printk(KERN_ERR DRV_NAME ": Failed to register net device\n");
+ goto err_out_res;
+ }
+
+ netif_carrier_on(dev);
+ return 0;
+
+err_out_res:
+ pci_release_regions(pdev);
+err_out_disable:
+ pci_disable_device(pdev);
+ pci_set_drvdata(pdev, NULL);
+ kfree(dev);
+
+ return err;
+}
+
+static void __devexit r6040_remove_one (struct pci_dev *pdev)
+{
+ struct net_device *dev = pci_get_drvdata(pdev);
+
+ unregister_netdev(dev);
+ pci_release_regions(pdev);
+ kfree(dev);
+ pci_disable_device(pdev);
+ pci_set_drvdata(pdev, NULL);
+}
+
+static int
+r6040_open(struct net_device *dev)
+{
+ struct r6040_private *lp = dev->priv;
+ int i;
+
+ RDC_DBUG("r6040_open()", 0);
+
+ /* Request IRQ and Register interrupt handler */
+ i = request_irq(dev->irq, &r6040_interrupt, SA_SHIRQ, dev->name, dev);
+ if (i) return i;
+
+ /* Allocate Descriptor memory */
+ lp->desc_pool = pci_alloc_consistent(lp->pdev, ALLOC_DESC_SIZE, &lp->desc_dma);
+ if (!lp->desc_pool) return -ENOMEM;
+
+ r6040_up(dev);
+
+ netif_start_queue(dev);
+
+ if (lp->switch_sig != 0x0243)
+ {
+ /* set and active a timer process */
+ init_timer(&lp->timer);
+ lp->timer.expires = TIMER_WUT;
+ lp->timer.data = (unsigned long)dev;
+ lp->timer.function = &r6040_timer;
+ add_timer(&lp->timer);
+ }
+ return 0;
+}
+
+static void
+r6040_tx_timeout (struct net_device *dev)
+{
+ struct r6040_private *lp = dev->priv;
+ //int ioaddr = dev->base_addr;
+ //struct r6040_descriptor *descptr = lp->tx_remove_ptr;
+
+ RDC_DBUG("r6040_tx_timeout()", 0);
+
+ /* Transmitter timeout, serious problems. */
+ /* Sten: Nothing need to do so far. */
+ printk(KERN_ERR DRV_NAME ": Big Trobule, transmit timeout/n");
+ lp->stats.tx_errors++;
+ netif_stop_queue(dev);
+
+//printk("<RDC> XMT timedout: CR0 %x, CR40 %x, CR3C %x, CR2C %x, CR30 %x, CR34 %x, CR38 %x\n", inw(ioaddr), inw(ioaddr+0x40), inw(ioaddr+0x3c), inw(ioaddr+0x2c), inw(ioaddr+0x30), inw(ioaddr+0x34), inw(ioaddr+0x38));
+
+//printk("<RDC> XMT_TO: %08lx:%04x %04x %08lx %08lx %08lx %08lx\n", descptr, descptr->status, descptr->len, descptr->buf, descptr->skb_ptr, descptr->ndesc, descptr->vndescp);
+}
+
+
+static int
+r6040_start_xmit(struct sk_buff *skb, struct net_device *dev)
+{
+ struct r6040_private *lp = dev->priv;
+ struct r6040_descriptor *descptr;
+ int ioaddr = dev->base_addr;
+ unsigned long flags;
+
+ RDC_DBUG("r6040_start_xmit()", 0);
+
+ if (skb == NULL) /* NULL skb directly return */
+ return 0;
+ if (skb->len >= MAX_BUF_SIZE) { /* Packet too long, drop it */
+ dev_kfree_skb(skb);
+ return 0;
+ }
+
+ /* Critical Section */
+ spin_lock_irqsave(&lp->lock, flags);
+
+ /* TX resource check */
+ if (!lp->tx_free_desc) {
+ spin_unlock_irqrestore(&lp->lock, flags);
+ printk(KERN_ERR DRV_NAME ": NO TX DESC ");
+ return 1;
+ }
+
+ /* Statistic Counter */
+ lp->stats.tx_packets++;
+ lp->stats.tx_bytes += skb->len;
+
+ /* Set TX descriptor & Transmit it */
+ lp->tx_free_desc--;
+ descptr = lp->tx_insert_ptr;
+ if (skb->len < 0x3c) descptr->len = 0x3c;
+ else descptr->len = skb->len;
+ descptr->skb_ptr = skb;
+ descptr->buf = cpu_to_le32(pci_map_single(lp->pdev, skb->data, skb->len, PCI_DMA_TODEVICE));
+ descptr->status = 0x8000;
+ outw(0x01, ioaddr + 0x14);
+ lp->tx_insert_ptr = descptr->vndescp;
+
+#if RDC_DEBUG
+ printk("Xmit(): %08lx:%04x %04x %08lx %08lx %08lx %08lx\n", descptr, descptr->status, descptr->len, descptr->buf, descptr->skb_ptr, descptr->ndesc, descptr->vndescp);
+#endif
+
+ /* If no tx resource, stop */
+ if (!lp->tx_free_desc)
+ netif_stop_queue(dev);
+
+ dev->trans_start = jiffies;
+ spin_unlock_irqrestore(&lp->lock, flags);
+ return 0;
+}
+
+/* The RDC interrupt handler. */
+static irqreturn_t
+r6040_interrupt(int irq, void *dev_id)
+{
+ struct net_device *dev = dev_id;
+ struct r6040_private *lp;
+ struct r6040_descriptor *descptr;
+ struct sk_buff *skb_ptr;
+ int ioaddr, status;
+ unsigned long flags;
+#ifdef CONFIG_R6040_NAPI
+ int handled = 1;
+#else
+ int handled = 0;
+#endif
+
+ RDC_DBUG("r6040_interrupt()", 0);
+ if (dev == NULL) {
+ printk (KERN_ERR DRV_NAME ": INT() unknown device.\n");
+ return IRQ_RETVAL(handled);
+ }
+
+ lp = (struct r6040_private *)dev->priv;
+ spin_lock_irqsave(&lp->lock, flags);
+
+ /* Check MAC Interrupt status */
+ ioaddr = dev->base_addr;
+ outw(0x0, ioaddr + 0x40); /* Mask Off RDC MAC interrupt */
+ status = inw(ioaddr + 0x3c); /* Read INTR status and clear */
+
+
+#ifdef CONFIG_R6040_NAPI
+
+ if(netif_rx_schedule_prep(dev))
+ {
+ NAPI_status = status ;
+ __netif_rx_schedule(dev);
+ }
+
+ spin_unlock_irqrestore(&lp->lock, flags);
+ return IRQ_RETVAL(handled);
+#else
+ /* TX interrupt request */
+ if (status & 0x10) {
+ handled = 1;
+ descptr = lp->tx_remove_ptr;
+ while(lp->tx_free_desc < TX_DCNT) {
+ if (descptr->status & 0x8000) break; /* Not complte */
+ skb_ptr = descptr->skb_ptr;
+ pci_unmap_single(lp->pdev, descptr->buf, skb_ptr->len, PCI_DMA_TODEVICE);
+ dev_kfree_skb_irq(skb_ptr); /* Free buffer */
+ descptr->skb_ptr = 0;
+ descptr = descptr->vndescp; /* To next descriptor */
+ lp->tx_free_desc++;
+ }
+ lp->tx_remove_ptr = descptr;
+ if (lp->tx_free_desc) netif_wake_queue(dev);
+ }
+
+ /* RX interrupt request */
+ if (status & 0x01) {
+ handled = 1;
+ descptr = lp->rx_remove_ptr;
+ while(lp->rx_free_desc) {
+ if (descptr->status & 0x8000) break; /* No Rx packet */
+ skb_ptr = descptr->skb_ptr;
+ descptr->skb_ptr = 0;
+ skb_ptr->dev = dev;
+ skb_put(skb_ptr, descptr->len - 4);
+ pci_unmap_single(lp->pdev, descptr->buf, MAX_BUF_SIZE, PCI_DMA_FROMDEVICE);
+ skb_ptr->protocol = eth_type_trans(skb_ptr, dev);
+ netif_rx(skb_ptr); /* Send to upper layer */
+ lp->stats.rx_packets++;
+ lp->stats.rx_bytes += descptr->len;
+ descptr = descptr->vndescp; /* To next descriptor */
+ lp->rx_free_desc--;
+ }
+ lp->rx_remove_ptr = descptr;
+ }
+
+ /* Allocate new RX buffer */
+ if (lp->rx_free_desc < RX_DCNT) rx_buf_alloc(lp,dev);
+
+ outw(R6040_INT_MASK, ioaddr + 0x40); /* TX/RX interrupt enable */
+ spin_unlock_irqrestore(&lp->lock, flags);
+#endif
+ return IRQ_RETVAL(handled);
+}
+
+
+static struct net_device_stats *
+r6040_get_stats(struct net_device *dev)
+{
+ struct r6040_private *lp = dev->priv;
+
+ RDC_DBUG("r6040_get_stats()", 0);
+ return &lp->stats;
+}
+
+/*
+ * Set or clear the multicast filter for this adaptor.
+ */
+static void
+set_multicast_list(struct net_device *dev)
+{
+ struct r6040_private *lp = dev->priv;
+ struct dev_mc_list *mcptr;
+ int ioaddr = dev->base_addr;
+ u16 *adrp, i;
+ unsigned long flags;
+
+ RDC_DBUG("set_multicast_list()", 0);
+
+ /* MAC Address */
+ adrp = (u16 *) dev->dev_addr;
+ outw(adrp[0], ioaddr + 0x68);
+ outw(adrp[1], ioaddr + 0x6A);
+ outw(adrp[2], ioaddr + 0x6C);
+
+
+#if RDC_DEBUG
+ printk("MAC ADDR: %04x %04x %04x\n", adrp[0], adrp[1], adrp[2]);
+#endif
+
+ /* Promiscous Mode */
+ spin_lock_irqsave(&lp->lock, flags);
+ i = inw(ioaddr) & ~0x0120; /* Clear AMCP & PROM */
+ if (dev->flags & IFF_PROMISC)
+ {
+ i |= 0x0020;
+ lp->mcr0 |= 0x0020 ;
+ }
+ if (dev->mc_count > 4) i |= 0x0020; /* Too many multicast address */
+ outw(i, ioaddr);
+ spin_unlock_irqrestore(&lp->lock, flags);
+
+ /* Multicast Address */
+ if (dev->mc_count > 4) /* Wait to do: Hash Table for multicast */
+ return;
+
+ /* Multicast Address 1~4 case */
+ for (i = 0, mcptr = dev->mc_list; (i<dev->mc_count) && (i<4); i++) {
+ adrp = (u16 *)mcptr->dmi_addr;
+ outw(adrp[0], ioaddr + 0x70 + 8*i);
+ outw(adrp[1], ioaddr + 0x72 + 8*i);
+ outw(adrp[2], ioaddr + 0x74 + 8*i);
+ mcptr = mcptr->next;
+#if RDC_DEBUG
+ printk("M_ADDR: %04x %04x %04x\n", adrp[0], adrp[1], adrp[2]);
+#endif
+ }
+ for (i = dev->mc_count; i < 4; i++) {
+ outw(0xffff, ioaddr + 0x68 + 8*i);
+ outw(0xffff, ioaddr + 0x6A + 8*i);
+ outw(0xffff, ioaddr + 0x6C + 8*i);
+ }
+}
+
+static void netdev_get_drvinfo (struct net_device *dev, struct ethtool_drvinfo *info)
+{
+ struct r6040_private *rp = dev->priv;
+
+ strcpy (info->driver, DRV_NAME);
+ strcpy (info->version, DRV_VERSION);
+ strcpy (info->bus_info, pci_name(rp->pdev));
+}
+
+static struct ethtool_ops netdev_ethtool_ops = {
+ .get_drvinfo = netdev_get_drvinfo,
+};
+
+static int
+r6040_close(struct net_device *dev)
+{
+ struct r6040_private *lp = dev->priv;
+
+ RDC_DBUG("r6040_close()", 0);
+
+ /* deleted timer */
+ del_timer_sync(&lp->timer);
+
+ spin_lock_irq(&lp->lock);
+
+ netif_stop_queue(dev);
+
+ r6040_down(dev);
+
+ spin_unlock_irq(&lp->lock);
+
+ return 0;
+}
+
+static int netdev_ioctl (struct net_device *dev, struct ifreq *rq, int cmd)
+{
+ struct r6040_private *lp = dev->priv;
+
+ RDC_DBUG("netdev_ioctl()", 0);
+ if (lp->switch_sig == 0x0243 && cmd == SIOCDEVPRIVATE)
+ {
+ unsigned long *data = (unsigned long *)rq->ifr_data, args[4];
+ int ioaddr = dev->base_addr;
+ unsigned int val;
+
+ data = (unsigned long *)rq->ifr_data;
+ if (copy_from_user(args, data, 4*sizeof(unsigned long)))
+ return -EFAULT;
+
+ /* port priority */
+ if(args[0]&(1<<31))phy_write(ioaddr,29,19,(phy_read(ioaddr,29,19)|0x2000)); /* port 0 */
+ if(args[0]&(1<<29))phy_write(ioaddr,29,19,(phy_read(ioaddr,29,19)|0x0020)); /* port 1 */
+ if(args[0]&(1<<27))phy_write(ioaddr,29,20,(phy_read(ioaddr,29,20)|0x2000)); /* port 2 */
+ if(args[0]&(1<<25))phy_write(ioaddr,29,20,(phy_read(ioaddr,29,20)|0x0020)); /* port 3 */
+
+ }
+ return -EOPNOTSUPP;
+}
+
+/**
+ Stop RDC MAC and Free the allocated resource
+ */
+static void r6040_down(struct net_device *dev)
+{
+ struct r6040_private *lp = dev->priv;
+ int i;
+ int ioaddr = dev->base_addr;
+
+ RDC_DBUG("r6040_down()", 0);
+
+ /* Stop MAC */
+ outw(0x0000, ioaddr + 0x40); /* Mask Off Interrupt */
+ outw(0x0001, ioaddr + 0x04); /* Reset RDC MAC */
+ i = 0;
+ do{}while((i++ < 2048) && (inw(ioaddr + 0x04) & 0x1));
+
+ free_irq(dev->irq, dev);
+
+ /* Free RX buffer */
+ for (i = 0; i < RX_DCNT; i++) {
+ if (lp->rx_insert_ptr->skb_ptr) {
+ pci_unmap_single(lp->pdev, lp->rx_insert_ptr->buf, MAX_BUF_SIZE, PCI_DMA_FROMDEVICE);
+ dev_kfree_skb(lp->rx_insert_ptr->skb_ptr);
+ lp->rx_insert_ptr->skb_ptr = 0;
+ }
+ lp->rx_insert_ptr = lp->rx_insert_ptr->vndescp;
+ }
+
+ /* Free TX buffer */
+ for (i = 0; i < TX_DCNT; i++) {
+ if (lp->tx_insert_ptr->skb_ptr) {
+ pci_unmap_single(lp->pdev, lp->tx_insert_ptr->buf, MAX_BUF_SIZE, PCI_DMA_TODEVICE);
+ dev_kfree_skb(lp->tx_insert_ptr->skb_ptr);
+ lp->rx_insert_ptr->skb_ptr = 0;
+ }
+ lp->tx_insert_ptr = lp->tx_insert_ptr->vndescp;
+ }
+
+ /* Free Descriptor memory */
+ pci_free_consistent(lp->pdev, ALLOC_DESC_SIZE, lp->desc_pool, lp->desc_dma);
+}
+
+
+
+#ifdef CONFIG_R6040_NAPI
+static int r6040_poll(struct net_device *dev, int *budget)
+{
+ struct r6040_private *lp;
+ struct r6040_descriptor *descptr;
+ struct sk_buff *skb_ptr;
+ int ioaddr, status;
+ unsigned long flags;
+
+
+ ioaddr = dev->base_addr;
+ lp = (struct r6040_private *)dev->priv;
+ unsigned long rx_work = dev->quota ;
+ unsigned long rx ;
+
+
+#if 1
+ /* TX interrupt request */
+ if (NAPI_status & 0x10) {
+
+ descptr = lp->tx_remove_ptr;
+ while(lp->tx_free_desc < TX_DCNT) {
+ if (descptr->status & 0x8000) break; /* Not complte */
+ skb_ptr = descptr->skb_ptr;
+ pci_unmap_single(lp->pdev, descptr->buf, skb_ptr->len, PCI_DMA_TODEVICE);
+ dev_kfree_skb_irq(skb_ptr); /* Free buffer */
+ descptr->skb_ptr = 0;
+ descptr = descptr->vndescp; /* To next descriptor */
+ lp->tx_free_desc++;
+ }
+ lp->tx_remove_ptr = descptr;
+ if (lp->tx_free_desc) netif_wake_queue(dev);
+ }
+#endif
+#if 1
+ /* RX interrupt request */
+ if (NAPI_status & 0x01) {
+
+ descptr = lp->rx_remove_ptr;
+ while(lp->rx_free_desc) {
+ if (descptr->status & 0x8000) break; /* No Rx packet */
+ skb_ptr = descptr->skb_ptr;
+ descptr->skb_ptr = 0;
+ skb_ptr->dev = dev;
+ skb_put(skb_ptr, descptr->len - 4);
+ pci_unmap_single(lp->pdev, descptr->buf, MAX_BUF_SIZE, PCI_DMA_FROMDEVICE);
+ skb_ptr->protocol = eth_type_trans(skb_ptr, dev);
+ netif_receive_skb(skb_ptr); /* Send to upper layer */
+ lp->stats.rx_packets++;
+ lp->stats.rx_bytes += descptr->len;
+ descptr = descptr->vndescp; /* To next descriptor */
+ lp->rx_free_desc--;
+ }
+ lp->rx_remove_ptr = descptr;
+
+ }
+ /* Allocate new RX buffer */
+ if (lp->rx_free_desc < RX_DCNT) rx_buf_alloc(lp,dev);
+
+ local_irq_disable();
+ netif_rx_complete(dev);
+ outw(R6040_INT_MASK,ioaddr + 0x40);
+ local_irq_enable();
+ return 0;
+#endif
+}
+#endif
+
+/* Init RDC MAC */
+static void r6040_up(struct net_device *dev)
+{
+ struct r6040_private *lp = dev->priv;
+ struct r6040_descriptor *descptr;
+ int i;
+ int ioaddr = dev->base_addr;
+ u32 tmp_addr;
+ dma_addr_t desc_dma, start_dma;
+
+ RDC_DBUG("r6040_up()", 0);
+
+ /* Initilize */
+ lp->tx_free_desc = TX_DCNT;
+ lp->rx_free_desc = 0;
+
+ /* Init descriptor */
+ memset(lp->desc_pool, 0, ALLOC_DESC_SIZE); /* Let all descriptor = 0 */
+ lp->tx_insert_ptr = (struct r6040_descriptor *)lp->desc_pool;
+ lp->tx_remove_ptr = lp->tx_insert_ptr;
+ lp->rx_insert_ptr = (struct r6040_descriptor *)lp->tx_insert_ptr+TX_DCNT;
+ lp->rx_remove_ptr = lp->rx_insert_ptr;
+
+ /* Init TX descriptor */
+ descptr = lp->tx_insert_ptr;
+ desc_dma = lp->desc_dma;
+ start_dma = desc_dma;
+ for (i = 0; i < TX_DCNT; i++) {
+ descptr->ndesc = cpu_to_le32(desc_dma + sizeof(struct r6040_descriptor));
+ descptr->vndescp = (descptr + 1);
+ descptr = (descptr + 1);
+ desc_dma += sizeof(struct r6040_descriptor);
+ }
+ (descptr - 1)->ndesc = cpu_to_le32(start_dma);
+ (descptr - 1)->vndescp = lp->tx_insert_ptr;
+
+ /* Init RX descriptor */
+ start_dma = desc_dma;
+ descptr = lp->rx_insert_ptr;
+ for (i = 0; i < RX_DCNT; i++) {
+ descptr->ndesc = cpu_to_le32(desc_dma + sizeof(struct r6040_descriptor));
+ descptr->vndescp = (descptr + 1);
+ descptr = (descptr + 1);
+ desc_dma += sizeof(struct r6040_descriptor);
+ }
+ (descptr - 1)->ndesc = cpu_to_le32(start_dma);
+ (descptr - 1)->vndescp = lp->rx_insert_ptr;
+
+ /* Allocate buffer for RX descriptor */
+ rx_buf_alloc(lp,dev);
+
+#if RDC_DEBUG
+descptr = lp->tx_insert_ptr;
+for (i = 0; i < TX_DCNT; i++) {
+ printk("%08lx:%04x %04x %08lx %08lx %08lx %08lx\n", descptr, descptr->status, descptr->len, descptr->buf, descptr->skb_ptr, descptr->ndesc, descptr->vndescp);
+ descptr = descptr->vndescp;
+}
+descptr = lp->rx_insert_ptr;
+for (i = 0; i < RX_DCNT; i++) {
+ printk("%08lx:%04x %04x %08lx %08lx %08lx %08lx\n", descptr, descptr->status, descptr->len, descptr->buf, descptr->skb_ptr, descptr->ndesc, descptr->vndescp);
+ descptr = descptr->vndescp;
+}
+#endif
+
+ /* MAC operation register */
+ outw(0x01, ioaddr+0x04); /* Reset MAC */
+ outw(2 , ioaddr+0xAC); /* Reset internal state machine */
+ outw(0 , ioaddr+0xAC);
+ udelay(5000);
+
+ /* TX and RX descriptor start Register */
+ tmp_addr = cpu_to_le32(lp->tx_insert_ptr);
+ tmp_addr = virt_to_bus((volatile void *)tmp_addr);
+ outw((u16) tmp_addr, ioaddr+0x2c);
+ outw(tmp_addr >> 16, ioaddr+0x30);
+ tmp_addr = cpu_to_le32(lp->rx_insert_ptr);
+ tmp_addr = virt_to_bus((volatile void *)tmp_addr);
+ outw((u16) tmp_addr, ioaddr+0x34);
+ outw(tmp_addr >> 16, ioaddr+0x38);
+
+ /* Buffer Size Register */
+ outw(MAX_BUF_SIZE, ioaddr+0x18);
+
+ if ((lp->switch_sig = phy_read(ioaddr, 0, 2)) == 0x0243) // ICPlus IP175C Signature
+ {
+ phy_write(ioaddr, 29,31, 0x175C); //Enable registers
+ lp->phy_mode = 0x8000;
+ } else {
+ /* PHY Mode Check */
+ phy_write(ioaddr, lp->phy_addr, 4, PHY_CAP);
+ phy_write(ioaddr, lp->phy_addr, 0, PHY_MODE);
+
+ if (PHY_MODE == 0x3100)
+ lp->phy_mode = phy_mode_chk(dev);
+ else
+ lp->phy_mode = (PHY_MODE & 0x0100) ? 0x8000:0x0;
+ }
+ /* MAC Bus Control Register */
+ outw(MBCR_DEFAULT, ioaddr+0x8);
+
+ /* MAC TX/RX Enable */
+ lp->mcr0 |= lp->phy_mode;
+ outw(lp->mcr0, ioaddr);
+
+ /* set interrupt waiting time and packet numbers */
+ outw(0x0802, ioaddr + 0x0C);
+ outw(0x0802, ioaddr + 0x10);
+
+ /* upgrade performance (by RDC guys) */
+ phy_write(ioaddr,30,17,(phy_read(ioaddr,30,17)|0x4000)); //bit 14=1
+ phy_write(ioaddr,30,17,~((~phy_read(ioaddr,30,17))|0x2000)); //bit 13=0
+ phy_write(ioaddr,0,19,0x0000);
+ phy_write(ioaddr,0,30,0x01F0);
+
+ /* Interrupt Mask Register */
+ outw(R6040_INT_MASK, ioaddr + 0x40);
+}
+
+/*
+ A periodic timer routine
+ Polling PHY Chip Link Status
+*/
+static void r6040_timer(unsigned long data)
+{
+ struct net_device *dev=(struct net_device *)data;
+ struct r6040_private *lp = dev->priv;
+ u16 ioaddr = dev->base_addr, phy_mode;
+
+ RDC_DBUG("r6040_timer()", 0);
+
+ /* Polling PHY Chip Status */
+ if (PHY_MODE == 0x3100)
+ phy_mode = phy_mode_chk(dev);
+ else phy_mode = (PHY_MODE & 0x0100) ? 0x8000:0x0;
+
+ if (phy_mode != lp->phy_mode) {
+ lp->phy_mode = phy_mode;
+ lp->mcr0 = (lp->mcr0 & 0x7fff) | phy_mode;
+ outw(lp->mcr0, ioaddr);
+ printk("<RDC> Link Change %x \n", inw(ioaddr));
+ }
+
+ /* Debug */
+// printk("<RDC> Timer: CR0 %x CR40 %x CR3C %x\n", inw(ioaddr), inw(ioaddr+0x40), inw(ioaddr+0x3c));
+
+ /* Timer active again */
+ lp->timer.expires = TIMER_WUT;
+ add_timer(&lp->timer);
+}
+
+/* Allocate skb buffer for rx descriptor */
+static void rx_buf_alloc(struct r6040_private *lp,struct net_device *dev)
+{
+ struct r6040_descriptor *descptr;
+ int ioaddr = dev->base_addr ;
+
+ RDC_DBUG("rx_buf_alloc()", 0);
+ descptr = lp->rx_insert_ptr;
+ while(lp->rx_free_desc < RX_DCNT){
+ descptr->skb_ptr = dev_alloc_skb(MAX_BUF_SIZE);
+ if (!descptr->skb_ptr) break;
+ descptr->buf = cpu_to_le32(pci_map_single(lp->pdev, descptr->skb_ptr->tail, MAX_BUF_SIZE, PCI_DMA_FROMDEVICE));
+ descptr->status = 0x8000;
+ descptr = descptr->vndescp;
+ lp->rx_free_desc++;
+ outw(lp->mcr0 | 0x0002, ioaddr); //Trigger Rx DMA
+ }
+ lp->rx_insert_ptr = descptr;
+}
+
+/* Status of PHY CHIP */
+static int phy_mode_chk(struct net_device *dev)
+{
+ struct r6040_private *lp = dev->priv;
+ int ioaddr = dev->base_addr, phy_dat;
+
+ RDC_DBUG("phy_mode_chk()", 0);
+
+ /* PHY Link Status Check */
+ phy_dat = phy_read(ioaddr, lp->phy_addr, 1);
+ if (!(phy_dat & 0x4)) return 0x8000; /* Link Failed, full duplex */
+
+ /* PHY Chip Auto-Negotiation Status */
+ phy_dat = phy_read(ioaddr, lp->phy_addr, 1);
+ if (phy_dat & 0x0020) {
+ /* Auto Negotiation Mode */
+ phy_dat = phy_read(ioaddr, lp->phy_addr, 5);
+ phy_dat &= phy_read(ioaddr, lp->phy_addr, 4);
+ if (phy_dat & 0x140) phy_dat = 0x8000;
+ else phy_dat = 0;
+ } else {
+ /* Force Mode */
+ phy_dat = phy_read(ioaddr, lp->phy_addr, 0);
+ if (phy_dat & 0x100) phy_dat = 0x8000;
+ else phy_dat = 0x0000;
+ }
+
+ return phy_dat;
+};
+
+/* Read a word data from PHY Chip */
+static int phy_read(int ioaddr, int phy_addr, int reg_idx)
+{
+ int i = 0;
+
+ RDC_DBUG("phy_read()", 0);
+ outw(0x2000 + reg_idx + (phy_addr << 8), ioaddr + 0x20);
+ do{}while( (i++ < 2048) && (inw(ioaddr + 0x20) & 0x2000) );
+
+ return inw(ioaddr + 0x24);
+}
+
+/* Write a word data from PHY Chip */
+static void phy_write(int ioaddr, int phy_addr, int reg_idx, int dat)
+{
+ int i = 0;
+
+ RDC_DBUG("phy_write()", 0);
+ outw(dat, ioaddr + 0x28);
+ outw(0x4000 + reg_idx + (phy_addr << 8), ioaddr + 0x20);
+ do{}while( (i++ < 2048) && (inw(ioaddr + 0x20) & 0x4000) );
+}
+
+enum {
+ RDC_6040 = 0
+};
+
+static struct pci_device_id r6040_pci_tbl[] = {
+ {0x17F3, 0x6040, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RDC_6040},
+ //{0x1106, 0x3065, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RDC_6040},
+ {0,} /* terminate list */
+};
+MODULE_DEVICE_TABLE(pci, r6040_pci_tbl);
+
+static struct pci_driver r6040_driver = {
+ .name = "r6040",
+ .id_table = r6040_pci_tbl,
+ .probe = r6040_init_one,
+ .remove = __devexit_p(r6040_remove_one),
+};
+
+
+static int __init r6040_init (void)
+{
+ RDC_DBUG("r6040_init()", 0);
+
+ printk(version);
+ printed_version = 1;
+
+ if (parent != NULL)
+ {
+ struct net_device *the_parent = dev_get_by_name(parent);
+
+ if (the_parent == NULL)
+ {
+ printk (KERN_ERR DRV_NAME ": Unknown device \"%s\" specified.\n", parent);
+ return -EINVAL;
+ }
+ memcpy((u8 *)&adr_table[0][0], the_parent->dev_addr, 6);
+ memcpy((u8 *)&adr_table[1][0], the_parent->dev_addr, 6);
+ ++*(u8 *)&adr_table[0][5];
+ }
+ return pci_register_driver (&r6040_driver);
+}
+
+
+static void __exit r6040_cleanup (void)
+{
+ RDC_DBUG("r6040_cleanup()", 0);
+ pci_unregister_driver (&r6040_driver);
+}
+
+module_init(r6040_init);
+module_exit(r6040_cleanup);
+
+
+/*
+ * Local variables:
+ * compile-command: "gcc -DMODULE -D__KERNEL__ -I/usr/src/linux/net/inet -Wall -Wstrict-prototypes -O6 -c r6040.c `[ -f /usr/include/linux/modversions.h ] && echo -DMODVERSIONS`"
+ * c-indent-level: 4
+ * c-basic-offset: 4
+ * tab-width: 4
+ * End:
+ */
diff --git a/target/linux/rdc/files/include/asm-i386/gpio.h b/target/linux/rdc/files/include/asm-i386/gpio.h
new file mode 100644
index 0000000000..ff87fca0ca
--- /dev/null
+++ b/target/linux/rdc/files/include/asm-i386/gpio.h
@@ -0,0 +1,6 @@
+#ifndef _ASM_I386_GPIO_H
+#define _ASM_I386_GPIO_H
+
+#include <gpio.h>
+
+#endif /* _ASM_I386_GPIO_H */
diff --git a/target/linux/rdc/files/include/asm-i386/mach-generic/gpio.h b/target/linux/rdc/files/include/asm-i386/mach-generic/gpio.h
new file mode 100644
index 0000000000..5305dcb96d
--- /dev/null
+++ b/target/linux/rdc/files/include/asm-i386/mach-generic/gpio.h
@@ -0,0 +1,15 @@
+#ifndef __ASM_MACH_GENERIC_GPIO_H
+#define __ASM_MACH_GENERIC_GPIO_H
+
+int gpio_request(unsigned gpio, const char *label);
+void gpio_free(unsigned gpio);
+int gpio_direction_input(unsigned gpio);
+int gpio_direction_output(unsigned gpio, int value);
+int gpio_get_value(unsigned gpio);
+void gpio_set_value(unsigned gpio, int value);
+int gpio_to_irq(unsigned gpio);
+int irq_to_gpio(unsigned irq);
+
+#include <asm-generic/gpio.h> /* cansleep wrappers */
+
+#endif /* __ASM_MACH_GENERIC_GPIO_H */
diff --git a/target/linux/rdc/files/include/asm-i386/mach-rdc/gpio.h b/target/linux/rdc/files/include/asm-i386/mach-rdc/gpio.h
new file mode 100644
index 0000000000..2368bd7583
--- /dev/null
+++ b/target/linux/rdc/files/include/asm-i386/mach-rdc/gpio.h
@@ -0,0 +1,56 @@
+#ifndef _RDC_GPIO_H
+#define _RDC_GPIO_H
+
+extern int rdc_gpio_get_value(unsigned gpio);
+extern void rdc_gpio_set_value(unsigned gpio, int value);
+extern int rdc_gpio_direction_input(unsigned gpio);
+extern int rdc_gpio_direction_output(unsigned gpio, int value);
+
+
+/* Wrappers for the arch-neutral GPIO API */
+
+static inline int gpio_request(unsigned gpio, const char *label)
+{
+ /* Not yet implemented */
+ return 0;
+}
+
+static inline void gpio_free(unsigned gpio)
+{
+ /* Not yet implemented */
+}
+
+static inline int gpio_direction_input(unsigned gpio)
+{
+ return rdc_gpio_direction_input(gpio);
+}
+
+static inline int gpio_direction_output(unsigned gpio, int value)
+{
+ return rdc_gpio_direction_output(gpio, value);
+}
+
+static inline int gpio_get_value(unsigned gpio)
+{
+ return rdc_gpio_get_value(gpio);
+}
+
+static inline void gpio_set_value(unsigned gpio, int value)
+{
+ rdc_gpio_set_value(gpio, value);
+}
+
+static inline int gpio_to_irq(unsigned gpio)
+{
+ return gpio;
+}
+
+static inline int irq_to_gpio(unsigned irq)
+{
+ return irq;
+}
+
+/* For cansleep */
+#include <asm-generic/gpio.h>
+
+#endif /* _RDC_GPIO_H_ */
diff --git a/target/linux/rdc/files/include/asm-i386/mach-rdc/rdc321x_defs.h b/target/linux/rdc/files/include/asm-i386/mach-rdc/rdc321x_defs.h
new file mode 100644
index 0000000000..838ba8f64f
--- /dev/null
+++ b/target/linux/rdc/files/include/asm-i386/mach-rdc/rdc321x_defs.h
@@ -0,0 +1,6 @@
+#define PFX "rdc321x: "
+
+/* General purpose configuration and data registers */
+#define RDC3210_CFGREG_ADDR 0x0CF8
+#define RDC3210_CFGREG_DATA 0x0CFC
+#define RDC_MAX_GPIO 0x3A
generated by cgit v1.2.3 (git 2.25.1) at 2024-11-02 21:50:37 +0000