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Diffstat (limited to 'target/linux/ramips/patches-5.4/0107-staging-mt7621-pci-fix-io-space-and-properly-set-res.patch')
-rw-r--r--target/linux/ramips/patches-5.4/0107-staging-mt7621-pci-fix-io-space-and-properly-set-res.patch131
1 files changed, 131 insertions, 0 deletions
diff --git a/target/linux/ramips/patches-5.4/0107-staging-mt7621-pci-fix-io-space-and-properly-set-res.patch b/target/linux/ramips/patches-5.4/0107-staging-mt7621-pci-fix-io-space-and-properly-set-res.patch
new file mode 100644
index 0000000000..393fd4d5dd
--- /dev/null
+++ b/target/linux/ramips/patches-5.4/0107-staging-mt7621-pci-fix-io-space-and-properly-set-res.patch
@@ -0,0 +1,131 @@
+From 3faf4e1c537de86058fc22a851cd979489b9185e Mon Sep 17 00:00:00 2001
+From: Sergio Paracuellos <sergio.paracuellos@gmail.com>
+Date: Wed, 18 Mar 2020 10:44:45 +0100
+Subject: [PATCH] staging: mt7621-pci: fix io space and properly set resource
+ limits
+
+Function 'mt7621_pci_parse_request_of_pci_ranges' is using
+'of_pci_range_to_resource' to get both mem and io resources.
+Internally this function calls to 'pci_address_to_pio' which
+returns -1 if io space address is an address > IO_SPACE_LIMIT
+which is 0xFFFF for mips. This mt7621 soc has io space in physical
+address 0x1e160000. In order to fix this, overwrite invalid io
+0xffffffff with properly values from the device tree and set
+mapped address of this resource as io port base memory address
+calling 'set_io_port_base' function. There is also need to properly
+setup resource limits and io and memory windows with properly
+parsed values instead of set them as 'no limit' which it is wrong.
+For any reason I don't really know legacy driver sets up mem window
+as 0xFFFFFFFF and any other value seems to does not work as expected,
+so set up also here with same values.
+
+Signed-off-by: Sergio Paracuellos <sergio.paracuellos@gmail.com>
+Link: https://lore.kernel.org/r/20200318094445.19669-1-sergio.paracuellos@gmail.com
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ drivers/staging/mt7621-pci/pci-mt7621.c | 43 +++++++++++++++++++--------------
+ 1 file changed, 25 insertions(+), 18 deletions(-)
+
+--- a/drivers/staging/mt7621-pci/pci-mt7621.c
++++ b/drivers/staging/mt7621-pci/pci-mt7621.c
+@@ -118,6 +118,7 @@ struct mt7621_pcie_port {
+ * @busn: bus range
+ * @offset: IO / Memory offset
+ * @dev: Pointer to PCIe device
++ * @io_map_base: virtual memory base address for io
+ * @ports: pointer to PCIe port information
+ * @resets_inverted: depends on chip revision
+ * reset lines are inverted.
+@@ -132,6 +133,7 @@ struct mt7621_pcie {
+ resource_size_t mem;
+ resource_size_t io;
+ } offset;
++ unsigned long io_map_base;
+ struct list_head ports;
+ bool resets_inverted;
+ };
+@@ -291,22 +293,21 @@ static int mt7621_pci_parse_request_of_p
+ }
+
+ for_each_of_pci_range(&parser, &range) {
+- struct resource *res = NULL;
+-
+ switch (range.flags & IORESOURCE_TYPE_BITS) {
+ case IORESOURCE_IO:
+- ioremap(range.cpu_addr, range.size);
+- res = &pcie->io;
++ pcie->io_map_base =
++ (unsigned long)ioremap(range.cpu_addr,
++ range.size);
++ of_pci_range_to_resource(&range, node, &pcie->io);
++ pcie->io.start = range.cpu_addr;
++ pcie->io.end = range.cpu_addr + range.size - 1;
+ pcie->offset.io = 0x00000000UL;
+ break;
+ case IORESOURCE_MEM:
+- res = &pcie->mem;
++ of_pci_range_to_resource(&range, node, &pcie->mem);
+ pcie->offset.mem = 0x00000000UL;
+ break;
+ }
+-
+- if (res)
+- of_pci_range_to_resource(&range, node, res);
+ }
+
+ err = of_pci_parse_bus_range(node, &pcie->busn);
+@@ -318,6 +319,8 @@ static int mt7621_pci_parse_request_of_p
+ pcie->busn.flags = IORESOURCE_BUS;
+ }
+
++ set_io_port_base(pcie->io_map_base);
++
+ return 0;
+ }
+
+@@ -548,6 +551,10 @@ static void mt7621_pcie_enable_ports(str
+ u32 slot;
+ u32 val;
+
++ /* Setup MEMWIN and IOWIN */
++ pcie_write(pcie, 0xffffffff, RALINK_PCI_MEMBASE);
++ pcie_write(pcie, pcie->io.start, RALINK_PCI_IOBASE);
++
+ list_for_each_entry(port, &pcie->ports, list) {
+ if (port->enabled) {
+ mt7621_pcie_port_clk_enable(port);
+@@ -668,11 +675,17 @@ static int mt7621_pci_probe(struct platf
+ return err;
+ }
+
++ err = mt7621_pci_parse_request_of_pci_ranges(pcie);
++ if (err) {
++ dev_err(dev, "Error requesting pci resources from ranges");
++ goto out_release_gpios;
++ }
++
+ /* set resources limits */
+- iomem_resource.start = 0;
+- iomem_resource.end = ~0UL; /* no limit */
+- ioport_resource.start = 0;
+- ioport_resource.end = ~0UL; /* no limit */
++ iomem_resource.start = pcie->mem.start;
++ iomem_resource.end = pcie->mem.end;
++ ioport_resource.start = pcie->io.start;
++ ioport_resource.end = pcie->io.end;
+
+ mt7621_pcie_init_ports(pcie);
+
+@@ -685,12 +698,6 @@ static int mt7621_pci_probe(struct platf
+
+ mt7621_pcie_enable_ports(pcie);
+
+- err = mt7621_pci_parse_request_of_pci_ranges(pcie);
+- if (err) {
+- dev_err(dev, "Error requesting pci resources from ranges");
+- goto out_release_gpios;
+- }
+-
+ setup_cm_memory_region(pcie);
+
+ err = mt7621_pcie_request_resources(pcie, &res);