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Diffstat (limited to 'target/linux/ramips/patches-4.4/0019-arch-mips-ralink-add-mt7621-cpu-feature-overrides.patch')
-rw-r--r--target/linux/ramips/patches-4.4/0019-arch-mips-ralink-add-mt7621-cpu-feature-overrides.patch79
1 files changed, 0 insertions, 79 deletions
diff --git a/target/linux/ramips/patches-4.4/0019-arch-mips-ralink-add-mt7621-cpu-feature-overrides.patch b/target/linux/ramips/patches-4.4/0019-arch-mips-ralink-add-mt7621-cpu-feature-overrides.patch
deleted file mode 100644
index a30e2f9a17..0000000000
--- a/target/linux/ramips/patches-4.4/0019-arch-mips-ralink-add-mt7621-cpu-feature-overrides.patch
+++ /dev/null
@@ -1,79 +0,0 @@
-From 43372c2be9fcf68bc40c322039c75893ce4e982c Mon Sep 17 00:00:00 2001
-From: John Crispin <blogic@openwrt.org>
-Date: Mon, 7 Dec 2015 17:20:47 +0100
-Subject: [PATCH 19/53] arch: mips: ralink: add mt7621 cpu-feature-overrides
-
-Signed-off-by: John Crispin <blogic@openwrt.org>
----
- .../asm/mach-ralink/mt7621/cpu-feature-overrides.h | 65 ++++++++++++++++++++
- 1 file changed, 65 insertions(+)
- create mode 100644 arch/mips/include/asm/mach-ralink/mt7621/cpu-feature-overrides.h
-
---- /dev/null
-+++ b/arch/mips/include/asm/mach-ralink/mt7621/cpu-feature-overrides.h
-@@ -0,0 +1,65 @@
-+/*
-+ * Ralink MT7621 specific CPU feature overrides
-+ *
-+ * Copyright (C) 2008-2009 Gabor Juhos <juhosg@openwrt.org>
-+ * Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
-+ * Copyright (C) 2015 Felix Fietkau <nbd@nbd.name>
-+ *
-+ * This file was derived from: include/asm-mips/cpu-features.h
-+ * Copyright (C) 2003, 2004 Ralf Baechle
-+ * Copyright (C) 2004 Maciej W. Rozycki
-+ *
-+ * This program is free software; you can redistribute it and/or modify it
-+ * under the terms of the GNU General Public License version 2 as published
-+ * by the Free Software Foundation.
-+ *
-+ */
-+#ifndef _MT7621_CPU_FEATURE_OVERRIDES_H
-+#define _MT7621_CPU_FEATURE_OVERRIDES_H
-+
-+#define cpu_has_tlb 1
-+#define cpu_has_4kex 1
-+#define cpu_has_3k_cache 0
-+#define cpu_has_4k_cache 1
-+#define cpu_has_tx39_cache 0
-+#define cpu_has_sb1_cache 0
-+#define cpu_has_fpu 0
-+#define cpu_has_32fpr 0
-+#define cpu_has_counter 1
-+#define cpu_has_watch 1
-+#define cpu_has_divec 1
-+
-+#define cpu_has_prefetch 1
-+#define cpu_has_ejtag 1
-+#define cpu_has_llsc 1
-+
-+#define cpu_has_mips16 1
-+#define cpu_has_mdmx 0
-+#define cpu_has_mips3d 0
-+#define cpu_has_smartmips 0
-+
-+#define cpu_has_mips32r1 1
-+#define cpu_has_mips32r2 1
-+#define cpu_has_mips64r1 0
-+#define cpu_has_mips64r2 0
-+
-+#define cpu_has_dsp 1
-+#define cpu_has_dsp2 0
-+#define cpu_has_mipsmt 1
-+
-+#define cpu_has_64bits 0
-+#define cpu_has_64bit_zero_reg 0
-+#define cpu_has_64bit_gp_regs 0
-+#define cpu_has_64bit_addresses 0
-+
-+#define cpu_dcache_line_size() 32
-+#define cpu_icache_line_size() 32
-+
-+#define cpu_has_dc_aliases 0
-+#define cpu_has_vtag_icache 0
-+
-+#define cpu_has_rixi 0
-+#define cpu_has_tlbinv 0
-+#define cpu_has_userlocal 1
-+
-+#endif /* _MT7621_CPU_FEATURE_OVERRIDES_H */