diff options
Diffstat (limited to 'target/linux/ramips/patches-4.3/0018-arch-mips-ralink-reset-pci-prior-to-reboot.patch')
| -rw-r--r-- | target/linux/ramips/patches-4.3/0018-arch-mips-ralink-reset-pci-prior-to-reboot.patch | 50 |
1 files changed, 50 insertions, 0 deletions
diff --git a/target/linux/ramips/patches-4.3/0018-arch-mips-ralink-reset-pci-prior-to-reboot.patch b/target/linux/ramips/patches-4.3/0018-arch-mips-ralink-reset-pci-prior-to-reboot.patch new file mode 100644 index 0000000000..dbd3db0106 --- /dev/null +++ b/target/linux/ramips/patches-4.3/0018-arch-mips-ralink-reset-pci-prior-to-reboot.patch @@ -0,0 +1,50 @@ +From d3c1e72c755cf67427b5d410039a096520d6537f Mon Sep 17 00:00:00 2001 +From: John Crispin <blogic@openwrt.org> +Date: Mon, 7 Dec 2015 17:19:55 +0100 +Subject: [PATCH 18/53] arch: mips: ralink: reset pci prior to reboot + +Signed-off-by: John Crispin <blogic@openwrt.org> +--- + arch/mips/ralink/reset.c | 12 ++++++++++-- + 1 file changed, 10 insertions(+), 2 deletions(-) + +diff --git a/arch/mips/ralink/reset.c b/arch/mips/ralink/reset.c +index ee26d45..ee117c4 100644 +--- a/arch/mips/ralink/reset.c ++++ b/arch/mips/ralink/reset.c +@@ -11,6 +11,7 @@ + #include <linux/pm.h> + #include <linux/io.h> + #include <linux/of.h> ++#include <linux/delay.h> + #include <linux/reset-controller.h> + + #include <asm/reboot.h> +@@ -18,8 +19,10 @@ + #include <asm/mach-ralink/ralink_regs.h> + + /* Reset Control */ +-#define SYSC_REG_RESET_CTRL 0x034 +-#define RSTCTL_RESET_SYSTEM BIT(0) ++#define SYSC_REG_RESET_CTRL 0x034 ++ ++#define RSTCTL_RESET_PCI BIT(26) ++#define RSTCTL_RESET_SYSTEM BIT(0) + + static int ralink_assert_device(struct reset_controller_dev *rcdev, + unsigned long id) +@@ -83,6 +86,11 @@ void ralink_rst_init(void) + + static void ralink_restart(char *command) + { ++ if (IS_ENABLED(CONFIG_PCI)) { ++ rt_sysc_m32(0, RSTCTL_RESET_PCI, SYSC_REG_RESET_CTRL); ++ mdelay(50); ++ } ++ + local_irq_disable(); + rt_sysc_w32(RSTCTL_RESET_SYSTEM, SYSC_REG_RESET_CTRL); + unreachable(); +-- +1.7.10.4 + |