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-rw-r--r--target/linux/ramips/patches-3.8/0128-MIPS-ralink-add-pinmux-driver.patch128
1 files changed, 128 insertions, 0 deletions
diff --git a/target/linux/ramips/patches-3.8/0128-MIPS-ralink-add-pinmux-driver.patch b/target/linux/ramips/patches-3.8/0128-MIPS-ralink-add-pinmux-driver.patch
new file mode 100644
index 0000000000..bf84dd9ebe
--- /dev/null
+++ b/target/linux/ramips/patches-3.8/0128-MIPS-ralink-add-pinmux-driver.patch
@@ -0,0 +1,128 @@
+From 5a2079532dfaf5762f658370ee7a0afb686f066e Mon Sep 17 00:00:00 2001
+From: John Crispin <blogic@openwrt.org>
+Date: Mon, 22 Apr 2013 23:11:42 +0200
+Subject: [PATCH 128/137] MIPS: ralink: add pinmux driver
+
+Add code to setup the pinmux on ralonk SoC. The SoC has a single 32 bit register
+for this functionality with simple on/off bits. Building a full featured pinctrl
+driver would be overkill.
+
+Signed-off-by: John Crispin <blogic@openwrt.org>
+---
+ arch/mips/ralink/Makefile | 2 +-
+ arch/mips/ralink/common.h | 2 ++
+ arch/mips/ralink/of.c | 2 ++
+ arch/mips/ralink/pinmux.c | 76 +++++++++++++++++++++++++++++++++++++++++++++
+ 4 files changed, 81 insertions(+), 1 deletion(-)
+ create mode 100644 arch/mips/ralink/pinmux.c
+
+--- a/arch/mips/ralink/Makefile
++++ b/arch/mips/ralink/Makefile
+@@ -6,7 +6,7 @@
+ # Copyright (C) 2009-2011 Gabor Juhos <juhosg@openwrt.org>
+ # Copyright (C) 2013 John Crispin <blogic@openwrt.org>
+
+-obj-y := prom.o of.o reset.o clk.o irq.o
++obj-y := prom.o of.o reset.o clk.o irq.o pinmux.o
+
+ obj-$(CONFIG_SOC_RT288X) += rt288x.o
+ obj-$(CONFIG_SOC_RT305X) += rt305x.o
+--- a/arch/mips/ralink/common.h
++++ b/arch/mips/ralink/common.h
+@@ -50,4 +50,6 @@ extern void prom_soc_init(struct ralink_
+
+ __iomem void *plat_of_remap_node(const char *node);
+
++void ralink_pinmux(void);
++
+ #endif /* _RALINK_COMMON_H__ */
+--- a/arch/mips/ralink/of.c
++++ b/arch/mips/ralink/of.c
+@@ -110,6 +110,8 @@ static int __init plat_of_setup(void)
+ if (of_platform_populate(NULL, of_ids, NULL, NULL))
+ panic("failed to populate DT\n");
+
++ ralink_pinmux();
++
+ return 0;
+ }
+
+--- /dev/null
++++ b/arch/mips/ralink/pinmux.c
+@@ -0,0 +1,76 @@
++/*
++ * This program is free software; you can redistribute it and/or modify it
++ * under the terms of the GNU General Public License version 2 as published
++ * by the Free Software Foundation.
++ *
++ * Copyright (C) 2013 John Crispin <blogic@openwrt.org>
++ */
++
++#include <linux/kernel.h>
++#include <linux/of.h>
++
++#include <asm/mach-ralink/ralink_regs.h>
++
++#include "common.h"
++
++#define SYSC_REG_GPIO_MODE 0x60
++
++static u32 ralink_mux_mask(const char *name, struct ralink_pinmux_grp *grps)
++{
++ for (; grps->name; grps++)
++ if (!strcmp(grps->name, name))
++ return grps->mask;
++
++ return 0;
++}
++
++void ralink_pinmux(void)
++{
++ const __be32 *wdt;
++ struct device_node *np;
++ struct property *prop;
++ const char *uart, *pin;
++ u32 mode = 0;
++
++ np = of_find_compatible_node(NULL, NULL, "ralink,rt3050-sysc");
++ if (!np)
++ return;
++
++ of_property_for_each_string(np, "ralink,gpiomux", prop, pin) {
++ int m = ralink_mux_mask(pin, rt_gpio_pinmux.mode);
++ if (m) {
++ mode |= m;
++ pr_debug("pinmux: registered gpiomux \"%s\"\n", pin);
++ } else {
++ pr_err("pinmux: failed to load \"%s\"\n", pin);
++ }
++ }
++
++ of_property_for_each_string(np, "ralink,pinmux", prop, pin) {
++ int m = ralink_mux_mask(pin, rt_gpio_pinmux.mode);
++ if (m) {
++ mode &= ~m;
++ pr_debug("pinmux: registered pinmux \"%s\"\n", pin);
++ } else {
++ pr_err("pinmux: failed to load group \"%s\"\n", pin);
++ }
++ }
++
++ of_property_read_string(np, "ralink,uartmux", &uart);
++ if (uart) {
++ int m = ralink_mux_mask(uart, rt_gpio_pinmux.uart);
++ mode |= rt_gpio_pinmux.uart_mask << rt_gpio_pinmux.uart_shift;
++ if (m) {
++ mode &= ~(m << rt_gpio_pinmux.uart_shift);
++ pr_debug("pinmux: registered uartmux \"%s\"\n", uart);
++ } else {
++ pr_debug("pinmux: registered uartmux \"gpio\"\n");
++ }
++ }
++
++ wdt = of_get_property(np, "ralink,wdtmux", NULL);
++ if (wdt && *wdt && rt_gpio_pinmux.wdt_reset)
++ rt_gpio_pinmux.wdt_reset();
++
++ rt_sysc_w32(mode, SYSC_REG_GPIO_MODE);
++}