aboutsummaryrefslogtreecommitdiffstats
path: root/target/linux/ramips/patches-3.8/0005-MIPS-ralink-adds-clkdev-code.patch
diff options
context:
space:
mode:
Diffstat (limited to 'target/linux/ramips/patches-3.8/0005-MIPS-ralink-adds-clkdev-code.patch')
-rw-r--r--target/linux/ramips/patches-3.8/0005-MIPS-ralink-adds-clkdev-code.patch97
1 files changed, 0 insertions, 97 deletions
diff --git a/target/linux/ramips/patches-3.8/0005-MIPS-ralink-adds-clkdev-code.patch b/target/linux/ramips/patches-3.8/0005-MIPS-ralink-adds-clkdev-code.patch
deleted file mode 100644
index 1fd60578d0..0000000000
--- a/target/linux/ramips/patches-3.8/0005-MIPS-ralink-adds-clkdev-code.patch
+++ /dev/null
@@ -1,97 +0,0 @@
-From b99289db258ee8a84e1bd555b2897476acf390c1 Mon Sep 17 00:00:00 2001
-From: John Crispin <blogic@openwrt.org>
-Date: Sun, 20 Jan 2013 22:01:29 +0100
-Subject: [PATCH 05/79] MIPS: ralink: adds clkdev code
-
-These SoCs have a limited number of fixed rate clocks. Add support for the
-clk and clkdev api.
-
-Signed-off-by: John Crispin <blogic@openwrt.org>
-Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
-Patchwork: http://patchwork.linux-mips.org/patch/4894/
----
- arch/mips/ralink/clk.c | 72 ++++++++++++++++++++++++++++++++++++++++++++++++
- 1 file changed, 72 insertions(+)
- create mode 100644 arch/mips/ralink/clk.c
-
-diff --git a/arch/mips/ralink/clk.c b/arch/mips/ralink/clk.c
-new file mode 100644
-index 0000000..8dfa22f
---- /dev/null
-+++ b/arch/mips/ralink/clk.c
-@@ -0,0 +1,72 @@
-+/*
-+ * This program is free software; you can redistribute it and/or modify it
-+ * under the terms of the GNU General Public License version 2 as published
-+ * by the Free Software Foundation.
-+ *
-+ * Copyright (C) 2011 Gabor Juhos <juhosg@openwrt.org>
-+ * Copyright (C) 2013 John Crispin <blogic@openwrt.org>
-+ */
-+
-+#include <linux/kernel.h>
-+#include <linux/module.h>
-+#include <linux/clkdev.h>
-+#include <linux/clk.h>
-+
-+#include <asm/time.h>
-+
-+#include "common.h"
-+
-+struct clk {
-+ struct clk_lookup cl;
-+ unsigned long rate;
-+};
-+
-+void ralink_clk_add(const char *dev, unsigned long rate)
-+{
-+ struct clk *clk = kzalloc(sizeof(struct clk), GFP_KERNEL);
-+
-+ if (!clk)
-+ panic("failed to add clock\n");
-+
-+ clk->cl.dev_id = dev;
-+ clk->cl.clk = clk;
-+
-+ clk->rate = rate;
-+
-+ clkdev_add(&clk->cl);
-+}
-+
-+/*
-+ * Linux clock API
-+ */
-+int clk_enable(struct clk *clk)
-+{
-+ return 0;
-+}
-+EXPORT_SYMBOL_GPL(clk_enable);
-+
-+void clk_disable(struct clk *clk)
-+{
-+}
-+EXPORT_SYMBOL_GPL(clk_disable);
-+
-+unsigned long clk_get_rate(struct clk *clk)
-+{
-+ return clk->rate;
-+}
-+EXPORT_SYMBOL_GPL(clk_get_rate);
-+
-+void __init plat_time_init(void)
-+{
-+ struct clk *clk;
-+
-+ ralink_of_remap();
-+
-+ ralink_clk_init();
-+ clk = clk_get_sys("cpu", NULL);
-+ if (IS_ERR(clk))
-+ panic("unable to get CPU clock, err=%ld", PTR_ERR(clk));
-+ pr_info("CPU Clock: %ldMHz\n", clk_get_rate(clk) / 1000000);
-+ mips_hpt_frequency = clk_get_rate(clk) / 2;
-+ clk_put(clk);
-+}
---
-1.7.10.4
-