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-rw-r--r--target/linux/ramips/dts/mt7620a_dlink_dwr-960.dts174
-rw-r--r--target/linux/ramips/dts/mt7620a_dlink_dwr-961-a1.dts62
-rw-r--r--target/linux/ramips/dts/mt7620a_dlink_dwr-96x.dtsi178
3 files changed, 243 insertions, 171 deletions
diff --git a/target/linux/ramips/dts/mt7620a_dlink_dwr-960.dts b/target/linux/ramips/dts/mt7620a_dlink_dwr-960.dts
index 77b94a1190..3de9533edc 100644
--- a/target/linux/ramips/dts/mt7620a_dlink_dwr-960.dts
+++ b/target/linux/ramips/dts/mt7620a_dlink_dwr-960.dts
@@ -1,93 +1,10 @@
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
-#include "mt7620a.dtsi"
-
-#include <dt-bindings/input/input.h>
-#include <dt-bindings/gpio/gpio.h>
-#include <dt-bindings/mtd/partitions/uimage.h>
+#include "mt7620a_dlink_dwr-96x.dtsi"
/ {
compatible = "dlink,dwr-960", "ralink,mt7620a-soc";
model = "D-Link DWR-960";
-
- aliases {
- led-boot = &led_status;
- led-failsafe = &led_status;
- led-running = &led_status;
- led-upgrade = &led_status;
- };
-
- keys {
- compatible = "gpio-keys";
-
- reset {
- label = "reset";
- gpios = <&gpio0 1 GPIO_ACTIVE_LOW>;
- linux,code = <KEY_RESTART>;
- };
-
- wps {
- label = "wps";
- gpios = <&gpio0 2 GPIO_ACTIVE_LOW>;
- linux,code = <KEY_WPS_BUTTON>;
- };
- };
-
- leds {
- compatible = "gpio-leds";
-
- led_status: status {
- label = "green:status";
- gpios = <&gpio0 7 GPIO_ACTIVE_LOW>;
- };
-
- wan {
- label = "green:wan";
- gpios = <&gpio0 11 GPIO_ACTIVE_LOW>;
- };
-
- lan {
- label = "green:lan";
- gpios = <&gpio0 12 GPIO_ACTIVE_LOW>;
- };
-
- sms {
- label = "green:sms";
- gpios = <&gpio1 15 GPIO_ACTIVE_LOW>;
- };
-
- signal_green {
- label = "green:signal";
- gpios = <&gpio2 0 GPIO_ACTIVE_HIGH>;
- };
-
- signal_red {
- label = "red:signal";
- gpios = <&gpio2 1 GPIO_ACTIVE_HIGH>;
- };
-
- 4g {
- label = "green:4g";
- gpios = <&gpio2 2 GPIO_ACTIVE_LOW>;
- };
-
- 3g {
- label = "green:3g";
- gpios = <&gpio2 3 GPIO_ACTIVE_LOW>;
- };
-
- wlan5g {
- label = "green:wlan5g";
- gpios = <&gpio2 4 GPIO_ACTIVE_LOW>;
- linux,default-trigger = "phy0tpt";
- };
-
- wlan2g {
- label = "green:wlan2g";
- gpios = <&gpio3 0 GPIO_ACTIVE_LOW>;
- linux,default-trigger = "phy1tpt";
- };
- };
};
&ethernet {
@@ -112,91 +29,6 @@
};
};
-&gpio1 {
- status = "okay";
-};
-
-&gpio2 {
- status = "okay";
-};
-
-&gpio3 {
- status = "okay";
-};
-
-&spi0 {
- status = "okay";
-
- flash@0 {
- compatible = "jedec,spi-nor";
- reg = <0>;
- spi-max-frequency = <50000000>;
-
- partitions {
- compatible = "fixed-partitions";
- #address-cells = <1>;
- #size-cells = <1>;
-
- partition@0 {
- label = "jboot";
- reg = <0x0 0x10000>;
- read-only;
- };
-
- partition@10000 {
- compatible = "openwrt,uimage", "denx,uimage";
- openwrt,ih-magic = <IH_MAGIC_OKLI>;
- openwrt,offset = <0x10000>;
- label = "firmware";
- reg = <0x10000 0xfe0000>;
- };
-
- config: partition@ff0000 {
- label = "config";
- reg = <0xff0000 0x10000>;
- read-only;
- };
- };
- };
-};
-
-&ehci {
- status = "okay";
-};
-
-&ohci {
- status = "okay";
-};
-
-&pcie {
- status = "okay";
-};
-
-&pcie0 {
- wifi@0,0 {
- compatible = "mediatek,mt76";
- reg = <0x0000 0 0 0 0>;
- ieee80211-freq-limit = <5000000 6000000>;
- mediatek,mtd-eeprom = <&config 0xe08e>;
- nvmem-cells = <&macaddr_config_e50e>;
- nvmem-cell-names = "mac-address";
- mac-address-increment = <2>;
- };
-};
-
-&state_default {
- default {
- groups = "i2c", "wled", "spi refclk", "uartf", "ephy";
- function = "gpio";
- };
-};
-
-&config {
- compatible = "nvmem-cells";
- #address-cells = <1>;
- #size-cells = <1>;
-
- macaddr_config_e50e: macaddr@e50e {
- reg = <0xe50e 0x6>;
- };
+&wifi {
+ mediatek,mtd-eeprom = <&config 0xe08e>;
};
diff --git a/target/linux/ramips/dts/mt7620a_dlink_dwr-961-a1.dts b/target/linux/ramips/dts/mt7620a_dlink_dwr-961-a1.dts
new file mode 100644
index 0000000000..7eae666668
--- /dev/null
+++ b/target/linux/ramips/dts/mt7620a_dlink_dwr-961-a1.dts
@@ -0,0 +1,62 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+/*
+ * D-Link DWR-961 A1 Board Description
+ * Copyright 2022 Pawel Dembicki <paweldembicki@gmail.com>
+ */
+#include "mt7620a_dlink_dwr-96x.dtsi"
+
+/ {
+ compatible = "dlink,dwr-961-a1", "ralink,mt7620a-soc";
+ model = "D-Link DWR-961 A1";
+
+ leds {
+ hidden-1 { /* hidden next to wlan5g led */
+ label = "green:hidden-1";
+ gpios = <&gpio0 13 GPIO_ACTIVE_LOW>;
+ };
+
+ hidden-2 { /* hidden next to sms led*/
+ label = "green:hidden-2";
+ gpios = <&gpio0 14 GPIO_ACTIVE_LOW>;
+ };
+ };
+};
+
+&ethernet {
+ pinctrl-names = "default";
+ pinctrl-0 = <&rgmii1_pins &mdio_pins>;
+
+ port@5 {
+ status = "okay";
+ phy-mode = "rgmii";
+ mediatek,fixed-link = <1000 1 1 1>;
+ };
+
+ mdio-bus {
+ status = "okay";
+
+ ethernet-phy@0 {
+ reg = <0>;
+ phy-mode = "rgmii";
+ qca,ar8327-initvals = <
+ 0x04 0x87300000 /* PORT0 PAD MODE CTRL */
+ 0x0c 0x00000000 /* PORT6 PAD MODE CTRL */
+ 0x7c 0x0000007e /* PORT0_STATUS */
+ 0x80 0x00001200 /* PORT1_STATUS */
+ 0x84 0x00001200 /* PORT2_STATUS */
+ 0x88 0x00001200 /* PORT3_STATUS */
+ 0x8c 0x00001200 /* PORT4_STATUS */
+ 0x90 0x00001200 /* PORT5_STATUS */
+ 0x94 0x00000000 /* PORT6_STATUS */
+ >;
+ };
+ };
+};
+
+&gsw {
+ mediatek,ephy-base = /bits/ 8 <8>;
+};
+
+&wifi {
+ mediatek,mtd-eeprom = <&config 0xe29e>;
+};
diff --git a/target/linux/ramips/dts/mt7620a_dlink_dwr-96x.dtsi b/target/linux/ramips/dts/mt7620a_dlink_dwr-96x.dtsi
new file mode 100644
index 0000000000..a5fd705eba
--- /dev/null
+++ b/target/linux/ramips/dts/mt7620a_dlink_dwr-96x.dtsi
@@ -0,0 +1,178 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+/*
+ * D-Link DWR-96x Common Board Description
+ * Copyright 2022 Pawel Dembicki <paweldembicki@gmail.com>
+ */
+#include "mt7620a.dtsi"
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+#include <dt-bindings/mtd/partitions/uimage.h>
+
+/ {
+ aliases {
+ led-boot = &led_status;
+ led-failsafe = &led_status;
+ led-running = &led_status;
+ led-upgrade = &led_status;
+ };
+
+ keys {
+ compatible = "gpio-keys";
+
+ reset {
+ label = "reset";
+ gpios = <&gpio0 1 GPIO_ACTIVE_LOW>;
+ linux,code = <KEY_RESTART>;
+ };
+
+ wps {
+ label = "wps";
+ gpios = <&gpio0 2 GPIO_ACTIVE_LOW>;
+ linux,code = <KEY_WPS_BUTTON>;
+ };
+
+ };
+
+ leds {
+ compatible = "gpio-leds";
+
+ led_status: status {
+ label = "green:status";
+ gpios = <&gpio0 7 GPIO_ACTIVE_LOW>;
+ };
+
+ wan {
+ label = "green:wan";
+ gpios = <&gpio0 11 GPIO_ACTIVE_LOW>;
+ };
+
+ lan {
+ label = "green:lan";
+ gpios = <&gpio0 12 GPIO_ACTIVE_LOW>;
+ };
+
+ sms {
+ label = "green:sms";
+ gpios = <&gpio1 15 GPIO_ACTIVE_LOW>;
+ };
+
+ signal_green {
+ label = "green:signal";
+ gpios = <&gpio2 0 GPIO_ACTIVE_HIGH>;
+ };
+
+ signal_red {
+ label = "red:signal";
+ gpios = <&gpio2 1 GPIO_ACTIVE_HIGH>;
+ };
+
+ 4g {
+ label = "green:4g";
+ gpios = <&gpio2 2 GPIO_ACTIVE_LOW>;
+ };
+
+ 3g {
+ label = "green:3g";
+ gpios = <&gpio2 3 GPIO_ACTIVE_LOW>;
+ };
+
+ wlan5g {
+ label = "green:wlan5g";
+ gpios = <&gpio2 4 GPIO_ACTIVE_LOW>;
+ linux,default-trigger = "phy0tpt";
+ };
+
+ wlan2g {
+ label = "green:wlan2g";
+ gpios = <&gpio3 0 GPIO_ACTIVE_LOW>;
+ linux,default-trigger = "phy1tpt";
+ };
+ };
+};
+
+&ehci {
+ status = "okay";
+};
+
+&gpio1 {
+ status = "okay";
+};
+
+&gpio2 {
+ status = "okay";
+};
+
+&gpio3 {
+ status = "okay";
+};
+
+&ohci {
+ status = "okay";
+};
+
+&pcie {
+ status = "okay";
+};
+
+&pcie0 {
+ wifi: wifi@0,0 {
+ compatible = "mediatek,mt76";
+ reg = <0x0000 0 0 0 0>;
+ ieee80211-freq-limit = <5000000 6000000>;
+ nvmem-cells = <&macaddr_config_e50e>;
+ nvmem-cell-names = "mac-address";
+ mac-address-increment = <(2)>;
+ };
+};
+
+&spi0 {
+ status = "okay";
+
+ flash@0 {
+ compatible = "jedec,spi-nor";
+ reg = <0>;
+ spi-max-frequency = <50000000>;
+
+ partitions {
+ compatible = "fixed-partitions";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ partition@0 {
+ label = "jboot";
+ reg = <0x0 0x10000>;
+ read-only;
+ };
+
+ partition@10000 {
+ compatible = "openwrt,uimage", "denx,uimage";
+ openwrt,ih-magic = <IH_MAGIC_OKLI>;
+ openwrt,offset = <0x10000>;
+ label = "firmware";
+ reg = <0x10000 0xfe0000>;
+ };
+
+ config: partition@ff0000 {
+ compatible = "nvmem-cells";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ label = "config";
+ reg = <0xff0000 0x10000>;
+ read-only;
+
+ macaddr_config_e50e: macaddr@e50e {
+ reg = <0xe50e 0x6>;
+ };
+ };
+ };
+ };
+};
+
+&state_default {
+ default {
+ groups = "i2c", "wled", "spi refclk", "uartf", "ephy";
+ function = "gpio";
+ };
+};
generated by cgit v1.2.3 (git 2.25.1) at 2024-09-07 17:41:10 +0000