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-rw-r--r--target/linux/ramips/dts/mt7628an_tplink_archer-c20-v5.dts98
1 files changed, 98 insertions, 0 deletions
diff --git a/target/linux/ramips/dts/mt7628an_tplink_archer-c20-v5.dts b/target/linux/ramips/dts/mt7628an_tplink_archer-c20-v5.dts
new file mode 100644
index 0000000000..e01826841d
--- /dev/null
+++ b/target/linux/ramips/dts/mt7628an_tplink_archer-c20-v5.dts
@@ -0,0 +1,98 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+/dts-v1/;
+
+#include "mt7628an_tplink_8m-split-uboot.dtsi"
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+
+/ {
+ compatible = "tplink,archer-c20-v5", "mediatek,mt7628an-soc";
+ model = "TP-Link Archer C20 v5";
+
+ aliases {
+ led-boot = &led_power;
+ led-failsafe = &led_power;
+ led-running = &led_power;
+ led-upgrade = &led_power;
+ };
+
+ keys {
+ compatible = "gpio-keys";
+
+ reset {
+ label = "reset";
+ gpios = <&gpio1 6 GPIO_ACTIVE_LOW>;
+ linux,code = <KEY_RESTART>;
+ };
+
+ rfkill {
+ label = "rfkill";
+ gpios = <&gpio1 5 GPIO_ACTIVE_LOW>;
+ linux,code = <KEY_RFKILL>;
+ };
+ };
+
+ leds {
+ compatible = "gpio-leds";
+
+ led_power: power {
+ label = "archer-c20-v5:green:power";
+ gpios = <&gpio0 2 GPIO_ACTIVE_LOW>;
+ };
+
+ wlan2g {
+ label = "archer-c20-v5:green:wlan2g";
+ gpios = <&gpio1 7 GPIO_ACTIVE_LOW>;
+ linux,default-trigger = "phy0tpt";
+ };
+
+ wlan5g {
+ label = "archer-c20-v5:green:wlan5g";
+ gpios = <&gpio1 8 GPIO_ACTIVE_LOW>;
+ linux,default-trigger = "phy1tpt";
+ };
+
+ lan {
+ label = "archer-c20-v5:green:lan";
+ gpios = <&gpio1 10 GPIO_ACTIVE_LOW>;
+ };
+
+ wan_green {
+ label = "archer-c20-v5:green:wan";
+ gpios = <&gpio1 11 GPIO_ACTIVE_LOW>;
+ };
+
+ wan_orange {
+ label = "archer-c20-v5:orange:wan";
+ gpios = <&gpio0 11 GPIO_ACTIVE_LOW>;
+ };
+
+ wps {
+ label = "archer-c20-v5:green:wps";
+ gpios = <&gpio1 9 GPIO_ACTIVE_LOW>;
+ };
+ };
+};
+
+&state_default {
+ gpio {
+ ralink,group = "i2s", "gpio", "refclk", "p0led_an", "p1led_an",
+ "p2led_an", "p3led_an", "p4led_an", "wdt";
+ ralink,function = "gpio";
+ };
+};
+
+&pcie {
+ status = "okay";
+};
+
+&pcie0 {
+ wifi@0,0 {
+ reg = <0x0000 0 0 0 0>;
+ mediatek,mtd-eeprom = <&radio 0x8000>;
+ ieee80211-freq-limit = <5000000 6000000>;
+ mtd-mac-address = <&rom 0xf100>;
+ mtd-mac-address-increment = <(-1)>;
+ };
+};