1 files changed, 150 insertions, 0 deletions
diff --git a/target/linux/ramips/dts/mt7628an_tplink_re305-v1.dts b/target/linux/ramips/dts/mt7628an_tplink_re305-v1.dts
new file mode 100644
index 0000000000..d1adb1b38a
--- /dev/null
+++ b/target/linux/ramips/dts/mt7628an_tplink_re305-v1.dts
@@ -0,0 +1,150 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+/dts-v1/;
+
+#include "mt7628an.dtsi"
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+
+/ {
+	compatible = "tplink,re305-v1", "mediatek,mt7628an-soc";
+	model = "TP-Link RE305 v1";
+
+	aliases {
+		led-boot = &led_power;
+		led-failsafe = &led_power;
+		led-running = &led_power;
+		led-upgrade = &led_power;
+		label-mac-device = &ethernet;
+	};
+
+	chosen {
+		bootargs = "console=ttyS0,57600";
+	};
+
+	keys {
+		compatible = "gpio-keys";
+
+		reset {
+			label = "reset";
+			gpios = <&gpio1 5 GPIO_ACTIVE_LOW>;
+			linux,code = <KEY_RESTART>;
+		};
+
+		wps {
+			label = "wps";
+			gpios = <&gpio1 6 GPIO_ACTIVE_LOW>;
+			linux,code = <KEY_WPS_BUTTON>;
+		};
+	};
+
+	leds {
+		compatible = "gpio-leds";
+
+		led_power: power {
+			label = "re305-v1:blue:power";
+			gpios = <&gpio1 7 GPIO_ACTIVE_LOW>;
+		};
+
+		wlan2g {
+			label = "re305-v1:blue:wlan2g";
+			gpios = <&gpio1 9 GPIO_ACTIVE_LOW>;
+			linux,default-trigger = "phy0tpt";
+		};
+
+		wlan5g {
+			label = "re305-v1:blue:wlan5g";
+			gpios = <&gpio1 8 GPIO_ACTIVE_LOW>;
+			linux,default-trigger = "phy1tpt";
+		};
+
+		rssi1 {
+			label = "re305-v1:red:rssi";
+			gpios = <&gpio1 11 GPIO_ACTIVE_LOW>;
+		};
+
+		rssi2 {
+			label = "re305-v1:blue:rssi";
+			gpios = <&gpio1 10 GPIO_ACTIVE_LOW>;
+		};
+	};
+};
+
+&spi0 {
+	status = "okay";
+
+	flash@0 {
+		compatible = "jedec,spi-nor";
+		reg = <0>;
+		spi-max-frequency = <50000000>;
+
+		partitions {
+			compatible = "fixed-partitions";
+			#address-cells = <1>;
+			#size-cells = <1>;
+
+			partition@0 {
+				label = "u-boot";
+				reg = <0x0 0x20000>;
+				read-only;
+			};
+
+			partition@20000 {
+				compatible = "tplink,firmware";
+				label = "firmware";
+				reg = <0x20000 0x5e0000>;
+			};
+
+			config: partition@600000 {
+				label = "config";
+				reg = <0x600000 0x50000>;
+				read-only;
+			};
+
+			/*
+				The flash space between 0x650000 and 0x7f0000 is blank in the
+				stock firmware so it is left out as well.
+			*/
+
+			radio: partition@7f0000 {
+				label = "radio";
+				reg = <0x7f0000 0x10000>;
+				read-only;
+			};
+		};
+	};
+};
+
+&state_default {
+	gpio {
+		ralink,group = "refclk", "wdt", "p0led_an", "p1led_an", "p2led_an", "p3led_an", "p4led_an";
+		ralink,function = "gpio";
+	};
+};
+
+&pcie {
+	status = "okay";
+};
+
+&pcie0 {
+	mt76@0,0 {
+		compatible = "mediatek,mt76";
+		reg = <0x0000 0 0 0 0>;
+		mediatek,mtd-eeprom = <&radio 0x8000>;
+		ieee80211-freq-limit = <5000000 6000000>;
+		mtd-mac-address = <&config 0x10008>;
+		mtd-mac-address-increment = <2>;
+	};
+};
+
+&wmac {
+	status = "okay";
+
+	mediatek,mtd-eeprom = <&radio 0x0>;
+	mtd-mac-address = <&config 0x10008>;
+	mtd-mac-address-increment = <1>;
+};
+
+&ethernet {
+	mtd-mac-address = <&config 0x10008>;
+};