diff options
Diffstat (limited to 'target/linux/ramips/dts/rt3352_dlink_dir-620-d1.dts')
| -rw-r--r-- | target/linux/ramips/dts/rt3352_dlink_dir-620-d1.dts | 114 |
1 files changed, 114 insertions, 0 deletions
diff --git a/target/linux/ramips/dts/rt3352_dlink_dir-620-d1.dts b/target/linux/ramips/dts/rt3352_dlink_dir-620-d1.dts new file mode 100644 index 0000000000..74fd4af753 --- /dev/null +++ b/target/linux/ramips/dts/rt3352_dlink_dir-620-d1.dts @@ -0,0 +1,114 @@ +/dts-v1/; + +#include "rt3352.dtsi" + +#include <dt-bindings/gpio/gpio.h> +#include <dt-bindings/input/input.h> + +/ { + compatible = "dlink,dir-620-d1", "ralink,rt3352-soc"; + model = "D-Link DIR-620 D1"; + + aliases { + led-boot = &led_status; + led-failsafe = &led_status; + led-running = &led_status; + led-upgrade = &led_status; + }; + + leds { + compatible = "gpio-leds"; + + led_status: status { + label = "dir-620-d1:green:status"; + gpios = <&gpio0 9 GPIO_ACTIVE_LOW>; + }; + + wifi { + label = "dir-620-d1:green:wifi"; + gpios = <&gpio0 17 GPIO_ACTIVE_LOW>; + }; + }; + + keys { + compatible = "gpio-keys-polled"; + poll-interval = <20>; + + reset_wps { + label = "reset_wps"; + gpios = <&gpio0 7 GPIO_ACTIVE_LOW>; + linux,code = <KEY_RESTART>; + }; + }; +}; + +&spi0 { + status = "okay"; + + m25p80@0 { + compatible = "jedec,spi-nor"; + reg = <0>; + spi-max-frequency = <10000000>; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + label = "u-boot"; + reg = <0x0 0x30000>; + read-only; + }; + + partition@30000 { + label = "u-boot-env"; + reg = <0x30000 0x10000>; + read-only; + }; + + factory: partition@40000 { + label = "factory"; + reg = <0x40000 0x10000>; + read-only; + }; + + partition@50000 { + compatible = "denx,uimage"; + label = "firmware"; + reg = <0x50000 0x7b0000>; + }; + }; + }; +}; + +&pinctrl { + state_default: pinctrl0 { + gpio { + ralink,group = "i2c", "jtag", "uartf"; + ralink,function = "gpio"; + }; + }; +}; + +ðernet { + mtd-mac-address = <&factory 0x4>; + pinctrl-names = "default"; + pinctrl-0 = <&rgmii_pins &mdio_pins>; +}; + +&esw { + mediatek,portmap = <0x2f>; +}; + +&wmac { + ralink,mtd-eeprom = <&factory 0>; +}; + +&ehci { + status = "okay"; +}; + +&ohci { + status = "okay"; +}; |