diff options
Diffstat (limited to 'target/linux/ramips/dts/mt7628an_mercury_mac1200r-v2.dts')
-rw-r--r-- | target/linux/ramips/dts/mt7628an_mercury_mac1200r-v2.dts | 107 |
1 files changed, 107 insertions, 0 deletions
diff --git a/target/linux/ramips/dts/mt7628an_mercury_mac1200r-v2.dts b/target/linux/ramips/dts/mt7628an_mercury_mac1200r-v2.dts new file mode 100644 index 0000000000..7d13621135 --- /dev/null +++ b/target/linux/ramips/dts/mt7628an_mercury_mac1200r-v2.dts @@ -0,0 +1,107 @@ +/dts-v1/; + +#include "mt7628an.dtsi" + +#include <dt-bindings/gpio/gpio.h> +#include <dt-bindings/input/input.h> + +/ { + compatible = "mercury,mac1200r-v2", "mediatek,mt7628an-soc"; + model = "Mercury MAC1200R v2"; + + aliases { + led-boot = &led_status; + led-failsafe = &led_status; + led-running = &led_status; + led-upgrade = &led_status; + }; + + chosen { + bootargs = "console=ttyS0,57600"; + }; + + memory@0 { + device_type = "memory"; + reg = <0x0 0x2000000>; + }; + + leds { + compatible = "gpio-leds"; + led_status: status { + label = "mac1200rv2:green:status"; + gpios = <&gpio0 11 GPIO_ACTIVE_LOW>; + }; + }; +}; + +&spi0 { + status = "okay"; + + m25p80@0 { + compatible = "jedec,spi-nor"; + reg = <0 0>; + spi-max-frequency = <10000000>; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + label = "u-boot"; + reg = <0x0 0x1d800>; + }; + + factory: partition@1d800 { + label = "factory_info"; + reg = <0x1d800 0x800>; + read-only; + }; + + art: partition@1e000 { + label = "art"; + reg = <0x1e000 0x2000>; + read-only; + }; + + partition@20000 { + label = "config"; + reg = <0x20000 0x10000>; + }; + + partition@30000 { + label = "u-boot2"; + reg = <0x30000 0x10000>; + }; + + partition@40000 { + compatible = "denx,uimage"; + label = "firmware"; + reg = <0x40000 0x7c0000>; + }; + }; + }; +}; + +ðernet { + pinctrl-names = "default"; + mtd-mac-address = <&factory 0xd>; + mediatek,portmap = "llllw"; +}; + +&wmac { + status = "okay"; + ralink,mtd-eeprom = <&art 0x0>; +}; + +&pcie { + status = "okay"; +}; + +&pcie0 { + mt76@0,0 { + reg = <0x0000 0 0 0 0>; + mediatek,mtd-eeprom = <&art 0x1000>; + ieee80211-freq-limit = <5000000 6000000>; + }; +}; |