diff options
Diffstat (limited to 'target/linux/ramips/dts/mt7621_arcadyan_wg4xx223.dtsi')
-rw-r--r-- | target/linux/ramips/dts/mt7621_arcadyan_wg4xx223.dtsi | 198 |
1 files changed, 198 insertions, 0 deletions
diff --git a/target/linux/ramips/dts/mt7621_arcadyan_wg4xx223.dtsi b/target/linux/ramips/dts/mt7621_arcadyan_wg4xx223.dtsi new file mode 100644 index 0000000000..5a845c4e9b --- /dev/null +++ b/target/linux/ramips/dts/mt7621_arcadyan_wg4xx223.dtsi @@ -0,0 +1,198 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT + +#include "mt7621.dtsi" + +#include <dt-bindings/gpio/gpio.h> +#include <dt-bindings/input/input.h> +#include <dt-bindings/leds/common.h> + +/ { + aliases { + led-boot = &led_status_red; + led-failsafe = &led_status_red; + led-running = &led_status_green; + led-upgrade = &led_status_red; + }; + + leds { + compatible = "gpio-leds"; + + led_status_green: led-1 { + label = "green:status"; + color = <LED_COLOR_ID_GREEN>; + function = LED_FUNCTION_STATUS; + gpios = <&gpio 15 GPIO_ACTIVE_LOW>; + }; + + led_status_red: led-2 { + label = "red:status"; + color = <LED_COLOR_ID_RED>; + function = LED_FUNCTION_STATUS; + gpios = <&gpio 16 GPIO_ACTIVE_LOW>; + }; + }; + + keys { + compatible = "gpio-keys"; + + reset { + label = "reset"; + gpios = <&gpio 3 GPIO_ACTIVE_LOW>; + linux,code = <KEY_RESTART>; + }; + }; + + ubi-concat { + compatible = "mtd-concat"; + devices = <&ubiconcat0 &ubiconcat1>; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + label = "ubi"; + reg = <0x0 0x5240000>; + }; + }; + }; +}; + +&nand { + status = "okay"; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + label = "u-boot"; + reg = <0x0 0x100000>; + read-only; + }; + + partition@100000 { + label = "u-boot-env"; + reg = <0x100000 0x100000>; + }; + + factory: partition@200000 { + label = "Factory"; + reg = <0x200000 0x100000>; + read-only; + + compatible = "nvmem-cells"; + #address-cells = <1>; + #size-cells = <1>; + + /* We keep the block below to prevent eth0 MAC + * from randomization. Unique WAN, LAN, WLAN MACs + * are stored in u-boot-env. + */ + + /* Default Ralink MAC (00:0c:43:28:80:xx) */ + macaddr_factory_fff0: macaddr@fff0 { + reg = <0xfff0 0x6>; + }; + }; + + partition@300000 { + label = "firmware"; + reg = <0x300000 0x2000000>; + + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + label = "kernel"; + reg = <0x0 0x440000>; + }; + + ubiconcat0: partition@400000 { + label = "ubiconcat0"; + reg = <0x440000 0x1bc0000>; + }; + }; + + partition@2300000 { + label = "Firmware2"; + reg = <0x2300000 0x2000000>; + read-only; + }; + + partition@4300000 { + label = "glbcfg"; + reg = <0x4300000 0x200000>; + read-only; + }; + + partition@4500000 { + label = "board_data"; + reg = <0x4500000 0x100000>; + read-only; + }; + + partition@4600000 { + label = "glbcfg2"; + reg = <0x4600000 0x200000>; + read-only; + }; + + partition@4800000 { + label = "board_data2"; + reg = <0x4800000 0x100000>; + read-only; + }; + + ubiconcat1: partition@4900000 { + label = "ubiconcat1"; + reg = <0x4900000 0x3680000>; + }; + }; +}; + +&pcie { + status = "okay"; +}; + +&pcie0 { + wifi@0,0 { + compatible = "mediatek,mt76"; + reg = <0x0000 0 0 0 0>; + mediatek,mtd-eeprom = <&factory 0x0>; + }; +}; + +&gmac0 { + nvmem-cells = <&macaddr_factory_fff0>; + nvmem-cell-names = "mac-address"; +}; + +&switch0 { + ports { + port@2 { + status = "okay"; + label = "lan2"; + }; + + port@3 { + status = "okay"; + label = "lan1"; + }; + + port@4 { + status = "okay"; + label = "wan"; + }; + }; +}; + +&state_default { + gpio { + groups = "i2c", "jtag"; + function = "gpio"; + }; +}; |