diff options
Diffstat (limited to 'target/linux/ramips/dts/mt7620n_zbtlink_zbt-cpe102.dts')
-rw-r--r-- | target/linux/ramips/dts/mt7620n_zbtlink_zbt-cpe102.dts | 129 |
1 files changed, 129 insertions, 0 deletions
diff --git a/target/linux/ramips/dts/mt7620n_zbtlink_zbt-cpe102.dts b/target/linux/ramips/dts/mt7620n_zbtlink_zbt-cpe102.dts new file mode 100644 index 0000000000..6f0213bf70 --- /dev/null +++ b/target/linux/ramips/dts/mt7620n_zbtlink_zbt-cpe102.dts @@ -0,0 +1,129 @@ +/dts-v1/; + +#include "mt7620n.dtsi" + +#include <dt-bindings/gpio/gpio.h> +#include <dt-bindings/input/input.h> + +/ { + compatible = "zbtlink,zbt-cpe102", "ralink,mt7620n-soc"; + model = "Zbtlink ZBT-CPE102"; + + chosen { + bootargs = "console=ttyS0,115200"; + }; + + + aliases { + led-boot = &led_4g_0; + led-failsafe = &led_4g_0; + }; + + leds { + compatible = "gpio-leds"; + + led_4g_0: 4g-0 { + label = "zbt-cpe102:green:4g-0"; + gpios = <&gpio1 14 GPIO_ACTIVE_LOW>; + }; + + 4g-1 { + label = "zbt-cpe102:green:4g-1"; + gpios = <&gpio0 2 GPIO_ACTIVE_LOW>; + }; + + 4g-2 { + label = "zbt-cpe102:green:4g-2"; + gpios = <&gpio1 15 GPIO_ACTIVE_LOW>; + }; + }; + + keys { + compatible = "gpio-keys-polled"; + poll-interval = <20>; + + reset { + label = "reset"; + gpios = <&gpio0 1 GPIO_ACTIVE_LOW>; + linux,code = <KEY_RESTART>; + }; + }; +}; + +&gpio1 { + status = "okay"; +}; + +&gpio2 { + status = "okay"; +}; + +&gpio3 { + status = "okay"; +}; + +&spi0 { + status = "okay"; + + en25q64@0 { + compatible = "jedec,spi-nor"; + reg = <0>; + spi-max-frequency = <10000000>; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + label = "u-boot"; + reg = <0x0 0x30000>; + read-only; + }; + + partition@30000 { + label = "u-boot-env"; + reg = <0x30000 0x10000>; + read-only; + }; + + factory: partition@40000 { + label = "factory"; + reg = <0x40000 0x10000>; + read-only; + }; + + partition@50000 { + compatible = "denx,uimage"; + label = "firmware"; + reg = <0x50000 0x760000>; + }; + }; + }; +}; + +&ehci { + status = "okay"; +}; + +&ohci { + status = "okay"; +}; + +ðernet { + mtd-mac-address = <&factory 0x4>; + mediatek,portmap = "wllll"; +}; + +&wmac { + ralink,mtd-eeprom = <&factory 0>; +}; + +&pinctrl { + state_default: pinctrl0 { + default { + ralink,group = "i2c", "spi refclk", "wled"; + ralink,function = "gpio"; + }; + }; +}; |