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Diffstat (limited to 'target/linux/ramips/dts/mt7620a_aigale_ai-br100.dts')
-rw-r--r--target/linux/ramips/dts/mt7620a_aigale_ai-br100.dts117
1 files changed, 117 insertions, 0 deletions
diff --git a/target/linux/ramips/dts/mt7620a_aigale_ai-br100.dts b/target/linux/ramips/dts/mt7620a_aigale_ai-br100.dts
new file mode 100644
index 0000000000..8de4b5877a
--- /dev/null
+++ b/target/linux/ramips/dts/mt7620a_aigale_ai-br100.dts
@@ -0,0 +1,117 @@
+/dts-v1/;
+
+#include "mt7620a.dtsi"
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+
+/ {
+ compatible = "aigale,ai-br100", "ralink,mt7620a-soc";
+ model = "Aigale Ai-BR100";
+
+ aliases {
+ led-boot = &led_wlan;
+ led-failsafe = &led_wlan;
+ led-running = &led_wlan;
+ led-upgrade = &led_wlan;
+ };
+
+ leds {
+ compatible = "gpio-leds";
+
+ wan {
+ label = "ai-br100:blue:wan";
+ gpios = <&gpio2 4 GPIO_ACTIVE_LOW>;
+ };
+
+ led_wlan: wlan {
+ label = "ai-br100:blue:wlan";
+ gpios = <&gpio3 0 GPIO_ACTIVE_LOW>;
+ };
+ };
+
+ keys {
+ compatible = "gpio-keys-polled";
+ poll-interval = <20>;
+
+ reset {
+ label = "reset";
+ gpios = <&gpio0 12 GPIO_ACTIVE_LOW>;
+ linux,code = <KEY_RESTART>;
+ };
+ };
+};
+
+&gpio2 {
+ status = "okay";
+};
+
+&gpio3 {
+ status = "okay";
+};
+
+&spi0 {
+ status = "okay";
+
+ m25p80@0 {
+ compatible = "jedec,spi-nor";
+ reg = <0 0>;
+ spi-max-frequency = <10000000>;
+
+ partitions {
+ compatible = "fixed-partitions";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ partition@0 {
+ label = "u-boot";
+ reg = <0x0 0x20000>;
+ read-only;
+ };
+
+ partition@20000 {
+ label = "u-boot-env";
+ reg = <0x20000 0x10000>;
+ read-only;
+ };
+
+ factory: partition@30000 {
+ label = "factory";
+ reg = <0x30000 0x10000>;
+ read-only;
+ };
+
+ partition@40000 {
+ compatible = "denx,uimage";
+ label = "firmware";
+ reg = <0x40000 0x7c0000>;
+ };
+ };
+ };
+};
+
+&ehci {
+ status = "okay";
+};
+
+&ohci {
+ status = "okay";
+};
+
+&pinctrl {
+ state_default: pinctrl0 {
+ gpio {
+ ralink,group = "i2c", "uartf", "rgmii1", "rgmii2", "ephy", "wled", "nd_sd";
+ ralink,function = "gpio";
+ };
+ };
+};
+
+&ethernet {
+ mtd-mac-address = <&factory 0x4>;
+ mediatek,portmap = "llllw";
+};
+
+&wmac {
+ ralink,mtd-eeprom = <&factory 0>;
+};