aboutsummaryrefslogtreecommitdiffstats
path: root/target/linux/ramips/dts/ZBT-WE3526.dts
diff options
context:
space:
mode:
Diffstat (limited to 'target/linux/ramips/dts/ZBT-WE3526.dts')
-rw-r--r--target/linux/ramips/dts/ZBT-WE3526.dts117
1 files changed, 117 insertions, 0 deletions
diff --git a/target/linux/ramips/dts/ZBT-WE3526.dts b/target/linux/ramips/dts/ZBT-WE3526.dts
new file mode 100644
index 0000000000..dc7896f13e
--- /dev/null
+++ b/target/linux/ramips/dts/ZBT-WE3526.dts
@@ -0,0 +1,117 @@
+/dts-v1/;
+
+#include "mt7621.dtsi"
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+
+/ {
+ compatible = "zbtlink,zbt-we3526", "mediatek,mt7621-soc";
+ model = "ZBT-WE3526";
+
+ memory@0 {
+ device_type = "memory";
+ reg = <0x0 0x1c000000>, <0x20000000 0x4000000>;
+ };
+
+ chosen {
+ bootargs = "console=ttyS0,115200";
+ };
+
+ palmbus: palmbus@1E000000 {
+ i2c@900 {
+ status = "okay";
+ };
+ };
+
+ gpio-keys-polled {
+ compatible = "gpio-keys-polled";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ poll-interval = <20>;
+
+ reset {
+ label = "reset";
+ gpios = <&gpio0 18 GPIO_ACTIVE_LOW>;
+ linux,code = <KEY_RESTART>;
+ };
+ };
+};
+
+&sdhci {
+ status = "okay";
+};
+
+&spi0 {
+ status = "okay";
+
+ m25p80@0 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "jedec,spi-nor";
+ reg = <0>;
+ spi-max-frequency = <10000000>;
+ m25p,chunked-io = <32>;
+
+ partition@0 {
+ label = "u-boot";
+ reg = <0x0 0x30000>;
+ read-only;
+ };
+
+ partition@30000 {
+ label = "u-boot-env";
+ reg = <0x30000 0x10000>;
+ read-only;
+ };
+
+ factory: partition@40000 {
+ label = "factory";
+ reg = <0x40000 0x10000>;
+ read-only;
+ };
+
+ firmware: partition@50000 {
+ label = "firmware";
+ reg = <0x50000 0xfb0000>;
+ };
+ };
+};
+
+&pcie {
+ status = "okay";
+
+ pcie0 {
+ wifi@14c3,7662 {
+ compatible = "pci14c3,7662";
+ reg = <0x0000 0 0 0 0>;
+ mediatek,mtd-eeprom = <&factory 0x8000>;
+ ieee80211-freq-limit = <5000000 6000000>;
+
+ led {
+ led-sources = <2>;
+ };
+ };
+ };
+
+ pcie1 {
+ wifi@14c3,7603 {
+ compatible = "pci14c3,7603";
+ reg = <0x0000 0 0 0 0>;
+ mediatek,mtd-eeprom = <&factory 0x0000>;
+ };
+ };
+};
+
+&ethernet {
+ mtd-mac-address = <&factory 0xe000>;
+};
+
+&pinctrl {
+ state_default: pinctrl0 {
+ gpio {
+ ralink,group = "wdt";
+ ralink,function = "gpio";
+ };
+ };
+};