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Diffstat (limited to 'target/linux/pistachio/patches-4.9/411-mtd-nand-Check-length-of-ID-before-reading-bits-per-.patch')
-rw-r--r--target/linux/pistachio/patches-4.9/411-mtd-nand-Check-length-of-ID-before-reading-bits-per-.patch38
1 files changed, 38 insertions, 0 deletions
diff --git a/target/linux/pistachio/patches-4.9/411-mtd-nand-Check-length-of-ID-before-reading-bits-per-.patch b/target/linux/pistachio/patches-4.9/411-mtd-nand-Check-length-of-ID-before-reading-bits-per-.patch
new file mode 100644
index 0000000000..cd2f8bb123
--- /dev/null
+++ b/target/linux/pistachio/patches-4.9/411-mtd-nand-Check-length-of-ID-before-reading-bits-per-.patch
@@ -0,0 +1,38 @@
+From 42ebff638003be18fab503b37de4ad7853244e95 Mon Sep 17 00:00:00 2001
+From: Ezequiel Garcia <ezequiel.garcia@imgtec.com>
+Date: Sat, 25 Feb 2017 15:58:22 +0000
+Subject: mtd: nand: Check length of ID before reading bits per cell
+
+The table-based NAND identification currently reads the number
+of bits per cell from the 3rd byte of the extended ID. This is done
+for the so-called 'full ID' devices; i.e. devices that have a known
+length ID.
+
+However, if the ID length is shorter than three, there's no 3rd byte,
+and so it's wrong to read the bits per cell from there. Fix this by
+adding a check for the ID length.
+
+(picked from http://lists.infradead.org/pipermail/linux-mtd/2014-December/056764.html)
+
+Signed-off-by: Ezequiel Garcia <ezequiel.garcia@imgtec.com>
+---
+ drivers/mtd/nand/nand_base.c | 3 ++-
+ 1 file changed, 2 insertions(+), 1 deletion(-)
+
+diff --git a/drivers/mtd/nand/nand_base.c b/drivers/mtd/nand/nand_base.c
+index 3bde96a..69b5cac 100644
+--- a/drivers/mtd/nand/nand_base.c
++++ b/drivers/mtd/nand/nand_base.c
+@@ -3964,7 +3964,8 @@ static bool find_full_id_nand(struct mtd_info *mtd, struct nand_chip *chip,
+ mtd->erasesize = type->erasesize;
+ mtd->oobsize = type->oobsize;
+
+- chip->bits_per_cell = nand_get_bits_per_cell(id_data[2]);
++ if (type->id_len > 2)
++ chip->bits_per_cell = nand_get_bits_per_cell(id_data[2]);
+ chip->chipsize = (uint64_t)type->chipsize << 20;
+ chip->options |= type->options;
+ chip->ecc_strength_ds = NAND_ECC_STRENGTH(type);
+--
+2.7.4
+