diff options
Diffstat (limited to 'target/linux/mvebu/patches-5.4/004-v5.5-arm64-dts-marvell-Add-AP807-quad-cache-description.patch')
| -rw-r--r-- | target/linux/mvebu/patches-5.4/004-v5.5-arm64-dts-marvell-Add-AP807-quad-cache-description.patch | 87 |
1 files changed, 0 insertions, 87 deletions
diff --git a/target/linux/mvebu/patches-5.4/004-v5.5-arm64-dts-marvell-Add-AP807-quad-cache-description.patch b/target/linux/mvebu/patches-5.4/004-v5.5-arm64-dts-marvell-Add-AP807-quad-cache-description.patch deleted file mode 100644 index 6192f5f202..0000000000 --- a/target/linux/mvebu/patches-5.4/004-v5.5-arm64-dts-marvell-Add-AP807-quad-cache-description.patch +++ /dev/null @@ -1,87 +0,0 @@ -From 30d53abdc60a6515f02f181e7c39b7b23d5fb3aa Mon Sep 17 00:00:00 2001 -From: Grzegorz Jaszczyk <jaz@semihalf.com> -Date: Fri, 4 Oct 2019 16:27:27 +0200 -Subject: [PATCH] arm64: dts: marvell: Add AP807-quad cache description - -Adding appropriate entries to device-tree allows the cache description -to show up in sysfs under: /sys/devices/system/cpu/cpuX/cache/. - -Signed-off-by: Grzegorz Jaszczyk <jaz@semihalf.com> -Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> -Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com> ---- - .../boot/dts/marvell/armada-ap807-quad.dtsi | 42 +++++++++++++++++++ - 1 file changed, 42 insertions(+) - ---- a/arch/arm64/boot/dts/marvell/armada-ap807-quad.dtsi -+++ b/arch/arm64/boot/dts/marvell/armada-ap807-quad.dtsi -@@ -22,6 +22,13 @@ - enable-method = "psci"; - #cooling-cells = <2>; - clocks = <&cpu_clk 0>; -+ i-cache-size = <0xc000>; -+ i-cache-line-size = <64>; -+ i-cache-sets = <256>; -+ d-cache-size = <0x8000>; -+ d-cache-line-size = <64>; -+ d-cache-sets = <256>; -+ next-level-cache = <&l2_0>; - }; - cpu1: cpu@1 { - device_type = "cpu"; -@@ -30,6 +37,13 @@ - enable-method = "psci"; - #cooling-cells = <2>; - clocks = <&cpu_clk 0>; -+ i-cache-size = <0xc000>; -+ i-cache-line-size = <64>; -+ i-cache-sets = <256>; -+ d-cache-size = <0x8000>; -+ d-cache-line-size = <64>; -+ d-cache-sets = <256>; -+ next-level-cache = <&l2_0>; - }; - cpu2: cpu@100 { - device_type = "cpu"; -@@ -38,6 +52,13 @@ - enable-method = "psci"; - #cooling-cells = <2>; - clocks = <&cpu_clk 1>; -+ i-cache-size = <0xc000>; -+ i-cache-line-size = <64>; -+ i-cache-sets = <256>; -+ d-cache-size = <0x8000>; -+ d-cache-line-size = <64>; -+ d-cache-sets = <256>; -+ next-level-cache = <&l2_1>; - }; - cpu3: cpu@101 { - device_type = "cpu"; -@@ -46,6 +67,27 @@ - enable-method = "psci"; - #cooling-cells = <2>; - clocks = <&cpu_clk 1>; -+ i-cache-size = <0xc000>; -+ i-cache-line-size = <64>; -+ i-cache-sets = <256>; -+ d-cache-size = <0x8000>; -+ d-cache-line-size = <64>; -+ d-cache-sets = <256>; -+ next-level-cache = <&l2_1>; -+ }; -+ -+ l2_0: l2-cache0 { -+ compatible = "cache"; -+ cache-size = <0x80000>; -+ cache-line-size = <64>; -+ cache-sets = <512>; -+ }; -+ -+ l2_1: l2-cache1 { -+ compatible = "cache"; -+ cache-size = <0x80000>; -+ cache-line-size = <64>; -+ cache-sets = <512>; - }; - }; - }; |