diff options
Diffstat (limited to 'target/linux/mvebu/patches-5.4/003-v5.5-arm64-dts-marvell-Add-support-for-AP807-AP807-quad.patch')
| -rw-r--r-- | target/linux/mvebu/patches-5.4/003-v5.5-arm64-dts-marvell-Add-support-for-AP807-AP807-quad.patch | 102 |
1 files changed, 102 insertions, 0 deletions
diff --git a/target/linux/mvebu/patches-5.4/003-v5.5-arm64-dts-marvell-Add-support-for-AP807-AP807-quad.patch b/target/linux/mvebu/patches-5.4/003-v5.5-arm64-dts-marvell-Add-support-for-AP807-AP807-quad.patch new file mode 100644 index 0000000000..72b46f51a7 --- /dev/null +++ b/target/linux/mvebu/patches-5.4/003-v5.5-arm64-dts-marvell-Add-support-for-AP807-AP807-quad.patch @@ -0,0 +1,102 @@ +From cbafcad0641e99831ff7c57ac8f79aed502f33e5 Mon Sep 17 00:00:00 2001 +From: Miquel Raynal <miquel.raynal@bootlin.com> +Date: Fri, 4 Oct 2019 16:27:24 +0200 +Subject: [PATCH] arm64: dts: marvell: Add support for AP807/AP807-quad + +Describe AP807 and AP807-quad support. + +Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> +Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com> +--- + .../boot/dts/marvell/armada-ap807-quad.dtsi | 51 +++++++++++++++++++ + arch/arm64/boot/dts/marvell/armada-ap807.dtsi | 29 +++++++++++ + 2 files changed, 80 insertions(+) + create mode 100644 arch/arm64/boot/dts/marvell/armada-ap807-quad.dtsi + create mode 100644 arch/arm64/boot/dts/marvell/armada-ap807.dtsi + +--- /dev/null ++++ b/arch/arm64/boot/dts/marvell/armada-ap807-quad.dtsi +@@ -0,0 +1,51 @@ ++// SPDX-License-Identifier: (GPL-2.0+ OR MIT) ++/* ++ * Device Tree file for Marvell Armada AP807 Quad ++ * ++ * Copyright (C) 2019 Marvell Technology Group Ltd. ++ */ ++ ++#include "armada-ap807.dtsi" ++ ++/ { ++ model = "Marvell Armada AP807 Quad"; ++ compatible = "marvell,armada-ap807-quad", "marvell,armada-ap807"; ++ ++ cpus { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ cpu0: cpu@0 { ++ device_type = "cpu"; ++ compatible = "arm,cortex-a72", "arm,armv8"; ++ reg = <0x000>; ++ enable-method = "psci"; ++ #cooling-cells = <2>; ++ clocks = <&cpu_clk 0>; ++ }; ++ cpu1: cpu@1 { ++ device_type = "cpu"; ++ compatible = "arm,cortex-a72", "arm,armv8"; ++ reg = <0x001>; ++ enable-method = "psci"; ++ #cooling-cells = <2>; ++ clocks = <&cpu_clk 0>; ++ }; ++ cpu2: cpu@100 { ++ device_type = "cpu"; ++ compatible = "arm,cortex-a72", "arm,armv8"; ++ reg = <0x100>; ++ enable-method = "psci"; ++ #cooling-cells = <2>; ++ clocks = <&cpu_clk 1>; ++ }; ++ cpu3: cpu@101 { ++ device_type = "cpu"; ++ compatible = "arm,cortex-a72", "arm,armv8"; ++ reg = <0x101>; ++ enable-method = "psci"; ++ #cooling-cells = <2>; ++ clocks = <&cpu_clk 1>; ++ }; ++ }; ++}; +--- /dev/null ++++ b/arch/arm64/boot/dts/marvell/armada-ap807.dtsi +@@ -0,0 +1,29 @@ ++// SPDX-License-Identifier: (GPL-2.0+ OR MIT) ++/* ++ * Device Tree file for Marvell Armada AP807 ++ * ++ * Copyright (C) 2019 Marvell Technology Group Ltd. ++ */ ++ ++#define AP_NAME ap807 ++#include "armada-ap80x.dtsi" ++ ++/ { ++ model = "Marvell Armada AP807"; ++ compatible = "marvell,armada-ap807"; ++}; ++ ++&ap_syscon0 { ++ ap_clk: clock { ++ compatible = "marvell,ap807-clock"; ++ #clock-cells = <1>; ++ }; ++}; ++ ++&ap_syscon1 { ++ cpu_clk: clock-cpu { ++ compatible = "marvell,ap807-cpu-clock"; ++ clocks = <&ap_clk 0>, <&ap_clk 1>; ++ #clock-cells = <1>; ++ }; ++}; |