diff options
Diffstat (limited to 'target/linux/mvebu/patches-5.10/019-PCI-aardvark-Add-PHY-support.patch')
-rw-r--r-- | target/linux/mvebu/patches-5.10/019-PCI-aardvark-Add-PHY-support.patch | 152 |
1 files changed, 0 insertions, 152 deletions
diff --git a/target/linux/mvebu/patches-5.10/019-PCI-aardvark-Add-PHY-support.patch b/target/linux/mvebu/patches-5.10/019-PCI-aardvark-Add-PHY-support.patch deleted file mode 100644 index fa04861e80..0000000000 --- a/target/linux/mvebu/patches-5.10/019-PCI-aardvark-Add-PHY-support.patch +++ /dev/null @@ -1,152 +0,0 @@ -From 366697018c9a2aa67d457bfdc495115cface6ae8 Mon Sep 17 00:00:00 2001 -From: =?UTF-8?q?Marek=20Beh=C3=BAn?= <marek.behun@nic.cz> -Date: Thu, 30 Apr 2020 10:06:20 +0200 -Subject: [PATCH] PCI: aardvark: Add PHY support -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -With recent proposed changes for U-Boot it is possible that bootloader -won't initialize the PHY for this controller (currently the PHY is -initialized regardless whether PCI is used in U-Boot, but with these -proposed changes the PHY is initialized only on request). - -Since the mvebu-a3700-comphy driver by Miquèl Raynal supports enabling -PCIe PHY, and since Linux' functionality should be independent on what -bootloader did, add code for enabling generic PHY if found in device OF -node. - -The mvebu-a3700-comphy driver does PHY powering via SMC calls to ARM -Trusted Firmware. The corresponding code in ARM Trusted Firmware skips -one register write which U-Boot does not: step 7 ("Enable TX"), see [1]. -Instead ARM Trusted Firmware expects PCIe driver to do this step, -probably because the register is in PCIe controller address space, -instead of PHY address space. We therefore add this step into the -advk_pcie_setup_hw function. - -[1] https://git.trustedfirmware.org/TF-A/trusted-firmware-a.git/tree/drivers/marvell/comphy/phy-comphy-3700.c?h=v2.3-rc2#n836 - -Link: https://lore.kernel.org/r/20200430080625.26070-8-pali@kernel.org -Tested-by: Tomasz Maciej Nowak <tmn505@gmail.com> -Signed-off-by: Marek Behún <marek.behun@nic.cz> -Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> -Reviewed-by: Rob Herring <robh@kernel.org> -Acked-by: Thomas Petazzoni <thomas.petazzoni@bootlin.com> -Cc: Miquèl Raynal <miquel.raynal@bootlin.com> ---- - drivers/pci/controller/pci-aardvark.c | 69 +++++++++++++++++++++++++++ - 1 file changed, 69 insertions(+) - ---- a/drivers/pci/controller/pci-aardvark.c -+++ b/drivers/pci/controller/pci-aardvark.c -@@ -16,6 +16,7 @@ - #include <linux/kernel.h> - #include <linux/pci.h> - #include <linux/init.h> -+#include <linux/phy/phy.h> - #include <linux/platform_device.h> - #include <linux/of_address.h> - #include <linux/of_gpio.h> -@@ -103,6 +104,8 @@ - #define PCIE_CORE_CTRL2_STRICT_ORDER_ENABLE BIT(5) - #define PCIE_CORE_CTRL2_OB_WIN_ENABLE BIT(6) - #define PCIE_CORE_CTRL2_MSI_ENABLE BIT(10) -+#define PCIE_CORE_REF_CLK_REG (CONTROL_BASE_ADDR + 0x14) -+#define PCIE_CORE_REF_CLK_TX_ENABLE BIT(1) - #define PCIE_MSG_LOG_REG (CONTROL_BASE_ADDR + 0x30) - #define PCIE_ISR0_REG (CONTROL_BASE_ADDR + 0x40) - #define PCIE_MSG_PM_PME_MASK BIT(7) -@@ -207,6 +210,7 @@ struct advk_pcie { - int link_gen; - struct pci_bridge_emul bridge; - struct gpio_desc *reset_gpio; -+ struct phy *phy; - }; - - static inline void advk_writel(struct advk_pcie *pcie, u32 val, u64 reg) -@@ -358,6 +362,11 @@ static void advk_pcie_setup_hw(struct ad - - advk_pcie_issue_perst(pcie); - -+ /* Enable TX */ -+ reg = advk_readl(pcie, PCIE_CORE_REF_CLK_REG); -+ reg |= PCIE_CORE_REF_CLK_TX_ENABLE; -+ advk_writel(pcie, reg, PCIE_CORE_REF_CLK_REG); -+ - /* Set to Direct mode */ - reg = advk_readl(pcie, CTRL_CONFIG_REG); - reg &= ~(CTRL_MODE_MASK << CTRL_MODE_SHIFT); -@@ -1083,6 +1092,62 @@ out_release_res: - return err; - } - -+static void __maybe_unused advk_pcie_disable_phy(struct advk_pcie *pcie) -+{ -+ phy_power_off(pcie->phy); -+ phy_exit(pcie->phy); -+} -+ -+static int advk_pcie_enable_phy(struct advk_pcie *pcie) -+{ -+ int ret; -+ -+ if (!pcie->phy) -+ return 0; -+ -+ ret = phy_init(pcie->phy); -+ if (ret) -+ return ret; -+ -+ ret = phy_set_mode(pcie->phy, PHY_MODE_PCIE); -+ if (ret) { -+ phy_exit(pcie->phy); -+ return ret; -+ } -+ -+ ret = phy_power_on(pcie->phy); -+ if (ret) { -+ phy_exit(pcie->phy); -+ return ret; -+ } -+ -+ return 0; -+} -+ -+static int advk_pcie_setup_phy(struct advk_pcie *pcie) -+{ -+ struct device *dev = &pcie->pdev->dev; -+ struct device_node *node = dev->of_node; -+ int ret = 0; -+ -+ pcie->phy = devm_of_phy_get(dev, node, NULL); -+ if (IS_ERR(pcie->phy) && (PTR_ERR(pcie->phy) == -EPROBE_DEFER)) -+ return PTR_ERR(pcie->phy); -+ -+ /* Old bindings miss the PHY handle */ -+ if (IS_ERR(pcie->phy)) { -+ dev_warn(dev, "PHY unavailable (%ld)\n", PTR_ERR(pcie->phy)); -+ pcie->phy = NULL; -+ return 0; -+ } -+ -+ ret = advk_pcie_enable_phy(pcie); -+ if (ret) -+ dev_err(dev, "Failed to initialize PHY (%d)\n", ret); -+ -+ return ret; -+} -+ - static int advk_pcie_probe(struct platform_device *pdev) - { - struct device *dev = &pdev->dev; -@@ -1140,6 +1205,10 @@ static int advk_pcie_probe(struct platfo - else - pcie->link_gen = ret; - -+ ret = advk_pcie_setup_phy(pcie); -+ if (ret) -+ return ret; -+ - advk_pcie_setup_hw(pcie); - - ret = advk_sw_pci_bridge_init(pcie); |