diff options
Diffstat (limited to 'target/linux/mvebu/patches-4.14/523-PCI-aardvark-set-PIO_ADDR_LS-correctly-in-advk_pcie_rd_conf.patch')
| -rw-r--r-- | target/linux/mvebu/patches-4.14/523-PCI-aardvark-set-PIO_ADDR_LS-correctly-in-advk_pcie_rd_conf.patch | 53 |
1 files changed, 53 insertions, 0 deletions
diff --git a/target/linux/mvebu/patches-4.14/523-PCI-aardvark-set-PIO_ADDR_LS-correctly-in-advk_pcie_rd_conf.patch b/target/linux/mvebu/patches-4.14/523-PCI-aardvark-set-PIO_ADDR_LS-correctly-in-advk_pcie_rd_conf.patch new file mode 100644 index 0000000000..238eb56269 --- /dev/null +++ b/target/linux/mvebu/patches-4.14/523-PCI-aardvark-set-PIO_ADDR_LS-correctly-in-advk_pcie_rd_conf.patch @@ -0,0 +1,53 @@ +From patchwork Thu Sep 28 12:58:33 2017 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +Subject: [v2, + 2/7] PCI: aardvark: set PIO_ADDR_LS correctly in advk_pcie_rd_conf() +X-Patchwork-Submitter: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> +X-Patchwork-Id: 819589 +Message-Id: <20170928125838.11887-3-thomas.petazzoni@free-electrons.com> +To: Bjorn Helgaas <bhelgaas@google.com>, linux-pci@vger.kernel.org +Cc: Jason Cooper <jason@lakedaemon.net>, Andrew Lunn <andrew@lunn.ch>, + Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>, Gregory Clement + <gregory.clement@free-electrons.com>, + Nadav Haklai <nadavh@marvell.com>, Hanna Hawa <hannah@marvell.com>, + Yehuda Yitschak <yehuday@marvell.com>, + linux-arm-kernel@lists.infradead.org, Antoine Tenart + <antoine.tenart@free-electrons.com>, =?utf-8?q?Miqu=C3=A8l_Raynal?= + <miquel.raynal@free-electrons.com>, Victor Gu <xigu@marvell.com>, + stable@vger.kernel.org, Thomas Petazzoni + <thomas.petazzoni@free-electrons.com> +Date: Thu, 28 Sep 2017 14:58:33 +0200 +From: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> +List-Id: <linux-pci.vger.kernel.org> + +From: Victor Gu <xigu@marvell.com> + +When setting the PIO_ADDR_LS register during a configuration read, we +were properly passing the device number, function number and register +number, but not the bus number, causing issues when reading the +configuration of PCIe devices. + +Fixes: 8c39d710363c1 ("PCI: aardvark: Add Aardvark PCI host controller driver") +Cc: <stable@vger.kernel.org> +Signed-off-by: Victor Gu <xigu@marvell.com> +Reviewed-by: Wilson Ding <dingwei@marvell.com> +Reviewed-by: Nadav Haklai <nadavh@marvell.com> +[Thomas: tweak commit log.] +Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> +--- + drivers/pci/host/pci-aardvark.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +--- a/drivers/pci/host/pci-aardvark.c ++++ b/drivers/pci/host/pci-aardvark.c +@@ -459,7 +459,7 @@ static int advk_pcie_rd_conf(struct pci_ + advk_writel(pcie, reg, PIO_CTRL); + + /* Program the address registers */ +- reg = PCIE_BDF(devfn) | PCIE_CONF_REG(where); ++ reg = PCIE_CONF_ADDR(bus->number, devfn, where); + advk_writel(pcie, reg, PIO_ADDR_LS); + advk_writel(pcie, 0, PIO_ADDR_MS); + |