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Diffstat (limited to 'target/linux/mvebu/patches-4.14/504-spi-a3700-Change-SPI-mode-before-asserting-chip-sele.patch')
-rw-r--r--target/linux/mvebu/patches-4.14/504-spi-a3700-Change-SPI-mode-before-asserting-chip-sele.patch70
1 files changed, 70 insertions, 0 deletions
diff --git a/target/linux/mvebu/patches-4.14/504-spi-a3700-Change-SPI-mode-before-asserting-chip-sele.patch b/target/linux/mvebu/patches-4.14/504-spi-a3700-Change-SPI-mode-before-asserting-chip-sele.patch
new file mode 100644
index 0000000000..3ac7091188
--- /dev/null
+++ b/target/linux/mvebu/patches-4.14/504-spi-a3700-Change-SPI-mode-before-asserting-chip-sele.patch
@@ -0,0 +1,70 @@
+From dd7aa8d4b53b3484ba31ba56f3ff1be7deb38530 Mon Sep 17 00:00:00 2001
+From: Maxime Chevallier <maxime.chevallier@smile.fr>
+Date: Tue, 10 Oct 2017 10:43:18 +0200
+Subject: spi: a3700: Change SPI mode before asserting chip-select
+
+The spi device mode should be configured in the controller before the
+chip-select is asserted, so that a clock polarity configuration change
+is not interpreted as a clock tick by the device.
+
+This patch moves the mode setting to the 'prepare_message' function
+instead of the 'transfer_one' function.
+
+By doing so, this patch also removes redundant code in
+a3700_spi_clock_set.
+
+This was tested on EspressoBin board, with spidev.
+
+Signed-off-by: Maxime Chevallier <maxime.chevallier@smile.fr>
+Signed-off-by: Mark Brown <broonie@kernel.org>
+---
+ drivers/spi/spi-armada-3700.c | 17 ++++-------------
+ 1 file changed, 4 insertions(+), 13 deletions(-)
+
+--- a/drivers/spi/spi-armada-3700.c
++++ b/drivers/spi/spi-armada-3700.c
+@@ -214,7 +214,7 @@ static void a3700_spi_mode_set(struct a3
+ }
+
+ static void a3700_spi_clock_set(struct a3700_spi *a3700_spi,
+- unsigned int speed_hz, u16 mode)
++ unsigned int speed_hz)
+ {
+ u32 val;
+ u32 prescale;
+@@ -239,17 +239,6 @@ static void a3700_spi_clock_set(struct a
+ val |= A3700_SPI_CLK_CAPT_EDGE;
+ spireg_write(a3700_spi, A3700_SPI_IF_TIME_REG, val);
+ }
+-
+- val = spireg_read(a3700_spi, A3700_SPI_IF_CFG_REG);
+- val &= ~(A3700_SPI_CLK_POL | A3700_SPI_CLK_PHA);
+-
+- if (mode & SPI_CPOL)
+- val |= A3700_SPI_CLK_POL;
+-
+- if (mode & SPI_CPHA)
+- val |= A3700_SPI_CLK_PHA;
+-
+- spireg_write(a3700_spi, A3700_SPI_IF_CFG_REG, val);
+ }
+
+ static void a3700_spi_bytelen_set(struct a3700_spi *a3700_spi, unsigned int len)
+@@ -431,7 +420,7 @@ static void a3700_spi_transfer_setup(str
+
+ a3700_spi = spi_master_get_devdata(spi->master);
+
+- a3700_spi_clock_set(a3700_spi, xfer->speed_hz, spi->mode);
++ a3700_spi_clock_set(a3700_spi, xfer->speed_hz);
+
+ byte_len = xfer->bits_per_word >> 3;
+
+@@ -592,6 +581,8 @@ static int a3700_spi_prepare_message(str
+
+ a3700_spi_bytelen_set(a3700_spi, 4);
+
++ a3700_spi_mode_set(a3700_spi, spi->mode);
++
+ return 0;
+ }
+