diff options
Diffstat (limited to 'target/linux/mvebu/patches-3.10/0116-mtd-nand-pxa3xx-Allow-to-set-clear-the-spare-enable-.patch')
| -rw-r--r-- | target/linux/mvebu/patches-3.10/0116-mtd-nand-pxa3xx-Allow-to-set-clear-the-spare-enable-.patch | 49 |
1 files changed, 49 insertions, 0 deletions
diff --git a/target/linux/mvebu/patches-3.10/0116-mtd-nand-pxa3xx-Allow-to-set-clear-the-spare-enable-.patch b/target/linux/mvebu/patches-3.10/0116-mtd-nand-pxa3xx-Allow-to-set-clear-the-spare-enable-.patch new file mode 100644 index 0000000000..eca13b4b0d --- /dev/null +++ b/target/linux/mvebu/patches-3.10/0116-mtd-nand-pxa3xx-Allow-to-set-clear-the-spare-enable-.patch @@ -0,0 +1,49 @@ +From be5f1d59341e48dbe0730253417c52bf79c6c3a7 Mon Sep 17 00:00:00 2001 +From: Ezequiel Garcia <ezequiel.garcia@free-electrons.com> +Date: Mon, 12 Aug 2013 14:14:49 -0300 +Subject: [PATCH 116/203] mtd: nand: pxa3xx: Allow to set/clear the 'spare + enable' field + +Some commands (such as the ONFI parameter page read) need to +clear the 'spare enable' bit. This commit allows to set/clear +depending on the prepared command, instead of having it always +set. + +Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com> +Tested-by: Daniel Mack <zonque@gmail.com> +Signed-off-by: Brian Norris <computersforpeace@gmail.com> +Signed-off-by: David Woodhouse <David.Woodhouse@intel.com> +--- + drivers/mtd/nand/pxa3xx_nand.c | 7 +++++++ + 1 file changed, 7 insertions(+) + +--- a/drivers/mtd/nand/pxa3xx_nand.c ++++ b/drivers/mtd/nand/pxa3xx_nand.c +@@ -185,6 +185,7 @@ struct pxa3xx_nand_info { + int cs; + int use_ecc; /* use HW ECC ? */ + int use_dma; /* use DMA ? */ ++ int use_spare; /* use spare ? */ + int is_ready; + + unsigned int page_size; /* page size of attached chip */ +@@ -325,6 +326,11 @@ static void pxa3xx_nand_start(struct pxa + else + ndcr &= ~NDCR_DMA_EN; + ++ if (info->use_spare) ++ ndcr |= NDCR_SPARE_EN; ++ else ++ ndcr &= ~NDCR_SPARE_EN; ++ + ndcr |= NDCR_ND_RUN; + + /* clear status bits and run */ +@@ -526,6 +532,7 @@ static int prepare_command_pool(struct p + info->buf_count = 0; + info->oob_size = 0; + info->use_ecc = 0; ++ info->use_spare = 1; + info->use_dma = (use_dma) ? 1 : 0; + info->is_ready = 0; + info->retcode = ERR_NONE; |