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-rw-r--r--target/linux/mpc85xx/patches-3.3/100-fix_mpc8568e_mds.patch32
-rw-r--r--target/linux/mpc85xx/patches-3.3/110-fix_mpc8548_cds.patch40
-rw-r--r--target/linux/mpc85xx/patches-3.3/120-mpc8548_cds_i8259_noirq_init.patch23
-rw-r--r--target/linux/mpc85xx/patches-3.3/130-mpc8548_cds_disable_i8259_irq.patch13
4 files changed, 108 insertions, 0 deletions
diff --git a/target/linux/mpc85xx/patches-3.3/100-fix_mpc8568e_mds.patch b/target/linux/mpc85xx/patches-3.3/100-fix_mpc8568e_mds.patch
new file mode 100644
index 0000000000..ba706f6a6b
--- /dev/null
+++ b/target/linux/mpc85xx/patches-3.3/100-fix_mpc8568e_mds.patch
@@ -0,0 +1,32 @@
+--- a/arch/powerpc/boot/dts/mpc8568mds.dts
++++ b/arch/powerpc/boot/dts/mpc8568mds.dts
+@@ -317,6 +317,9 @@
+ gpios = <&bcsr5 3 0>;
+ };
+ };
++ chosen {
++ linux,stdout-path = "/soc8568@e0000000/serial@4500";
++ };
+ };
+
+ /include/ "fsl/mpc8568si-post.dtsi"
+--- a/arch/powerpc/boot/dts/fsl/mpc8568si-post.dtsi
++++ b/arch/powerpc/boot/dts/fsl/mpc8568si-post.dtsi
+@@ -134,17 +134,8 @@
+
+ };
+
+- duart-sleep-nexus {
+- #address-cells = <1>;
+- #size-cells = <1>;
+- compatible = "simple-bus";
+- sleep = <&pmc 0x00000002>;
+- ranges;
+-
+ /include/ "pq3-duart-0.dtsi"
+
+- };
+-
+ L2: l2-cache-controller@20000 {
+ compatible = "fsl,mpc8568-l2-cache-controller";
+ reg = <0x20000 0x1000>;
diff --git a/target/linux/mpc85xx/patches-3.3/110-fix_mpc8548_cds.patch b/target/linux/mpc85xx/patches-3.3/110-fix_mpc8548_cds.patch
new file mode 100644
index 0000000000..291a843ed6
--- /dev/null
+++ b/target/linux/mpc85xx/patches-3.3/110-fix_mpc8548_cds.patch
@@ -0,0 +1,40 @@
+--- a/arch/powerpc/boot/dts/mpc8548cds.dts
++++ b/arch/powerpc/boot/dts/mpc8548cds.dts
+@@ -301,6 +301,9 @@
+ 0x0 0x100000>;
+ };
+ };
++ chosen {
++ linux,stdout-path = "/soc8548@e0000000/serial@4600";
++ };
+ };
+
+ /include/ "fsl/mpc8548si-post.dtsi"
+--- a/arch/powerpc/boot/dts/fsl/mpc8548si-post.dtsi
++++ b/arch/powerpc/boot/dts/fsl/mpc8548si-post.dtsi
+@@ -116,7 +116,24 @@
+
+ /include/ "pq3-i2c-0.dtsi"
+ /include/ "pq3-i2c-1.dtsi"
+-/include/ "pq3-duart-0.dtsi"
++
++ serial0: serial@4600 {
++ cell-index = <1>;
++ device_type = "serial";
++ compatible = "fsl,ns16550", "ns16550";
++ reg = <0x4600 0x100>;
++ clock-frequency = <0>;
++ interrupts = <42 2 0 0>;
++ };
++
++ serial1: serial@4500 {
++ cell-index = <0>;
++ device_type = "serial";
++ compatible = "fsl,ns16550", "ns16550";
++ reg = <0x4500 0x100>;
++ clock-frequency = <0>;
++ interrupts = <42 2 0 0>;
++ };
+
+ L2: l2-cache-controller@20000 {
+ compatible = "fsl,mpc8548-l2-cache-controller";
diff --git a/target/linux/mpc85xx/patches-3.3/120-mpc8548_cds_i8259_noirq_init.patch b/target/linux/mpc85xx/patches-3.3/120-mpc8548_cds_i8259_noirq_init.patch
new file mode 100644
index 0000000000..79c0e18fe6
--- /dev/null
+++ b/target/linux/mpc85xx/patches-3.3/120-mpc8548_cds_i8259_noirq_init.patch
@@ -0,0 +1,23 @@
+--- a/arch/powerpc/platforms/85xx/mpc85xx_cds.c
++++ b/arch/powerpc/platforms/85xx/mpc85xx_cds.c
+@@ -215,15 +215,16 @@ static int mpc85xx_cds_8259_attach(void)
+ return -ENODEV;
+ }
+
++ i8259_init(cascade_node, 0);
++ of_node_put(cascade_node);
++
+ cascade_irq = irq_of_parse_and_map(cascade_node, 0);
+ if (cascade_irq == NO_IRQ) {
+- printk(KERN_ERR "Failed to map cascade interrupt\n");
++ of_node_put(cascade_node);
++ printk(KERN_DEBUG "No interrupt for i8259 PIC\n");
+ return -ENXIO;
+ }
+
+- i8259_init(cascade_node, 0);
+- of_node_put(cascade_node);
+-
+ /*
+ * Hook the interrupt to make sure desc->action is never NULL.
+ * This is required to ensure that the interrupt does not get
diff --git a/target/linux/mpc85xx/patches-3.3/130-mpc8548_cds_disable_i8259_irq.patch b/target/linux/mpc85xx/patches-3.3/130-mpc8548_cds_disable_i8259_irq.patch
new file mode 100644
index 0000000000..07ed66daae
--- /dev/null
+++ b/target/linux/mpc85xx/patches-3.3/130-mpc8548_cds_disable_i8259_irq.patch
@@ -0,0 +1,13 @@
+--- a/arch/powerpc/boot/dts/mpc8548cds.dts
++++ b/arch/powerpc/boot/dts/mpc8548cds.dts
+@@ -260,8 +260,10 @@
+ #address-cells = <0>;
+ #interrupt-cells = <2>;
+ compatible = "chrp,iic";
++/*
+ interrupts = <0 1 0 0>;
+ interrupt-parent = <&mpic>;
++*/
+ };
+
+ rtc@70 {