1 files changed, 207 insertions, 0 deletions
diff --git a/target/linux/mpc85xx/files/arch/powerpc/boot/dts/red-15w-rev1.dts b/target/linux/mpc85xx/files/arch/powerpc/boot/dts/red-15w-rev1.dts
new file mode 100644
index 0000000000..600426bb6e
--- /dev/null
+++ b/target/linux/mpc85xx/files/arch/powerpc/boot/dts/red-15w-rev1.dts
@@ -0,0 +1,207 @@
+// SPDX-License-Identifier: GPL-2.0-or-later or MIT
+
+/include/ "fsl/p1010si-pre.dtsi"
+
+/ {
+	model = "Sophos RED 15w Rev.1";
+	compatible = "sophos,red-15w-rev1";
+
+	memory {
+		device_type = "memory";
+	};
+
+	leds {
+		compatible = "gpio-leds";
+
+		system_green {
+			gpios = <&gpio0 7 0>;
+			label = "red-15w-rev1:green:system";
+		};
+
+		system_red {
+			gpios = <&gpio0 3 0>;
+			label = "red-15w-rev1:red:system";
+		};
+
+		router {
+			gpios = <&gpio0 5 1>;
+			label = "red-15w-rev1:green:router";
+		};
+
+		internet {
+			gpios = <&gpio0 4 1>;
+			label = "red-15w-rev1:green:internet";
+		};
+
+		tunnel {
+			gpios = <&gpio0 8 1>;
+			label = "red-15w-rev1:green:tunnel";
+		};
+	};
+
+	soc: soc@ffe00000 {
+		ranges = <0x0 0x0 0xffe00000 0x100000>;
+
+		i2c@3000 {
+			eeprom@50 {
+				compatible = "st,24c256";
+				reg = <0x50>;
+			};
+		};
+
+		i2c@3100 {
+			eeprom@52 {
+				compatible = "atmel,24c01";
+				reg = < 0x52 >;
+			};
+		};
+
+		gpio0: gpio-controller@fc00 {
+		};
+
+		usb@22000 {
+			phy_type = "utmi";
+			dr_mode = "host";
+		};
+
+		mdio@24000 {
+			phy0: ethernet-phy@0 {
+				reg = <0x0>;
+			};
+		};
+
+		mdio@25000 {
+			tbi_phy: tbi-phy@11 {
+				reg = <0x11>;
+			};
+		};
+
+		mdio@26000 {
+			status = "disabled";
+		};
+
+		enet0: ethernet@b0000 {
+			phy-connection-type = "rgmii-id";
+
+			fixed-link {
+				speed = <1000>;
+				full-duplex;
+			};
+		};
+
+		enet1: ethernet@b1000 {
+			phy-handle = <&phy0>;
+			phy-connection-type = "sgmii";
+
+			tbi-handle = <&tbi_phy>;
+		};
+
+		enet2: ethernet@b2000 {
+			status = "disabled";
+		};
+
+		sdhc@2e000 {
+			status = "disabled";
+		};
+	};
+
+	ifc: ifc@ffe1e000 {
+		reg = <0x0 0xffe1e000 0 0x2000>;
+
+		/* NOR, NAND Flashes and CPLD on board */
+		ranges = <0x0 0x0 0x0 0xee000000 0x02000000
+			0x1 0x0 0x0 0xff800000 0x00010000
+			0x3 0x0 0x0 0xffb00000 0x00000020>;
+
+		nand@1,0 {
+			compatible = "fsl,ifc-nand";
+			reg = <0x1 0x0 0x10000>;
+
+			partitions {
+				compatible = "fixed-partitions";
+				#address-cells = <1>;
+				#size-cells = <1>;
+
+				/*
+				 * Original partition layout:
+				 * 0x000000000000-0x000000100000 : "NAND U-Boot Image"
+				 * 0x000000100000-0x000000200000 : "NAND U-Boot Environment"
+				 * 0x000000200000-0x000000300000 : "Provisioning"
+				 *  - OS-Image 1
+				 * 0x000000300000-0x000000400000 : "fdt1"
+				 * 0x000000400000-0x000000c00000 : "uimage1"
+				 * 0x000000c00000-0x000001c00000 : "rootfs1"
+				 *  - OS-Image 2
+				 * 0x000001c00000-0x000001d00000 : "fdt2"
+				 * 0x000001d00000-0x000002500000 : "uimage2"
+				 * 0x000002500000-0x000003500000 : "rootfs2"
+				 *  - Empty
+				 * 0x000003500000-0x000008000000 : "data"
+				 */
+
+				partition@0 {
+					reg = <0x0 0x100000>;
+					label = "u-boot";
+					read-only;
+				};
+
+				partition@100000 {
+					reg = <0x100000 0x100000>;
+					label = "u-boot-env";
+				};
+
+				partition@200000 {
+					reg = <0x200000 0x100000>;
+					label = "provisioning";
+					read-only;
+				};
+
+				partition@300000 {
+					reg = <0x300000 0x800000>;
+					label = "kernel";
+				};
+
+				partition@b00000 {
+					reg = <0xb00000 0x7500000>;
+					label = "ubi";
+				};
+
+				oem-partition@300000 {
+					reg = <0x300000 0x1900000>;
+					label = "sophos-os1";
+				};
+
+				oem-partition@1c00000 {
+					reg = <0x1c00000 0x1900000>;
+					label = "sophos-os2";
+				};
+
+				oem-partition@3500000 {
+					reg = <0x3500000 0x4b00000>;
+					label = "sophos-data";
+				};
+			};
+		};
+	};
+
+	pci0: pcie@ffe09000 {
+		status = "disabled";
+	};
+
+	pci1: pcie@ffe0a000 {
+		reg = <0 0xffe0a000 0 0x1000>;
+		ranges = <0x2000000 0x0 0x80000000 0 0x80000000 0x0 0x20000000
+			  0x1000000 0x0 0x00000000 0 0xffc00000 0x0 0x10000>;
+		pcie@0 {
+			ranges = <0x2000000 0x0 0x80000000
+				  0x2000000 0x0 0x80000000
+				  0x0 0x20000000
+
+				  0x1000000 0x0 0x0
+				  0x1000000 0x0 0x0
+				  0x0 0x100000>;
+		};
+	};
+};
+
+/include/ "fsl/p1010si-post.dtsi"