diff options
Diffstat (limited to 'target/linux/mediatek')
3 files changed, 125 insertions, 19 deletions
diff --git a/target/linux/mediatek/patches-5.4/0999-hnat.patch b/target/linux/mediatek/patches-5.4/0999-hnat.patch index 5e4b4734e5..66c29cf1c0 100644 --- a/target/linux/mediatek/patches-5.4/0999-hnat.patch +++ b/target/linux/mediatek/patches-5.4/0999-hnat.patch @@ -147,20 +147,7 @@ #include "mtk_eth_soc.h" -@@ -69,10 +71,12 @@ u32 mtk_m32(struct mtk_eth *eth, u32 mas - { - u32 val; - -+ spin_lock(ð->page_lock); - val = mtk_r32(eth, reg); - val &= ~mask; - val |= set; - mtk_w32(eth, val, reg); -+ spin_unlock(ð->page_lock); - return reg; - } - -@@ -1298,8 +1302,16 @@ static int mtk_poll_rx(struct napi_struc +@@ -1298,8 +1312,16 @@ static int mtk_poll_rx(struct napi_struc (trxd.rxd2 & RX_DMA_VTAG)) __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), RX_DMA_VID(trxd.rxd3)); @@ -179,7 +166,7 @@ ring->data[idx] = new_data; rxd->rxd1 = (unsigned int)dma_addr; -@@ -2216,6 +2228,9 @@ static int mtk_open(struct net_device *d +@@ -2216,6 +2238,9 @@ static int mtk_open(struct net_device *d mtk_tx_irq_enable(eth, MTK_TX_DONE_INT); mtk_rx_irq_enable(eth, MTK_RX_DONE_INT); refcount_set(ð->dma_refcnt, 1); @@ -189,7 +176,7 @@ } else refcount_inc(ð->dma_refcnt); -@@ -2274,6 +2289,9 @@ static int mtk_stop(struct net_device *d +@@ -2274,6 +2299,9 @@ static int mtk_stop(struct net_device *d mtk_dma_free(eth); @@ -199,7 +186,7 @@ return 0; } -@@ -2733,6 +2751,27 @@ static int mtk_set_rxnfc(struct net_devi +@@ -2733,6 +2761,27 @@ static int mtk_set_rxnfc(struct net_devi return ret; } @@ -227,7 +214,7 @@ static const struct ethtool_ops mtk_ethtool_ops = { .get_link_ksettings = mtk_get_link_ksettings, .set_link_ksettings = mtk_set_link_ksettings, -@@ -2764,6 +2803,9 @@ static const struct net_device_ops mtk_n +@@ -2764,6 +2813,9 @@ static const struct net_device_ops mtk_n #ifdef CONFIG_NET_POLL_CONTROLLER .ndo_poll_controller = mtk_poll_controller, #endif @@ -237,7 +224,7 @@ }; static int mtk_add_mac(struct mtk_eth *eth, struct device_node *np) -@@ -3097,6 +3139,7 @@ static const struct mtk_soc_data mt7622_ +@@ -3097,6 +3149,7 @@ static const struct mtk_soc_data mt7622_ .hw_features = MTK_HW_FEATURES, .required_clks = MT7622_CLKS_BITMAP, .required_pctl = false, diff --git a/target/linux/mediatek/patches-5.4/1000-eth-gdm-config-backport.patch b/target/linux/mediatek/patches-5.4/1000-eth-gdm-config-backport.patch new file mode 100644 index 0000000000..29b5406bae --- /dev/null +++ b/target/linux/mediatek/patches-5.4/1000-eth-gdm-config-backport.patch @@ -0,0 +1,94 @@ +diff -urN a/drivers/net/ethernet/mediatek/mtk_eth_soc.c b/drivers/net/ethernet/mediatek/mtk_eth_soc.c +--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c 2020-04-21 14:33:05.702816632 +0800 ++++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c 2020-04-21 14:33:19.590328084 +0800 +@@ -2191,6 +2191,31 @@ + return 0; + } + ++static void mtk_gdm_config(struct mtk_eth *eth, u32 config) ++{ ++ int i; ++ ++ if (MTK_HAS_CAPS(eth->soc->caps, MTK_SOC_MT7628)) ++ return; ++ ++ for (i = 0; i < MTK_MAC_COUNT; i++) { ++ u32 val = mtk_r32(eth, MTK_GDMA_FWD_CFG(i)); ++ ++ /* default setup the forward port to send frame to PDMA */ ++ val &= ~0xffff; ++ ++ /* Enable RX checksum */ ++ val |= MTK_GDMA_ICS_EN | MTK_GDMA_TCS_EN | MTK_GDMA_UCS_EN; ++ ++ val |= config; ++ ++ mtk_w32(eth, val, MTK_GDMA_FWD_CFG(i)); ++ } ++ /* Reset and enable PSE */ ++ mtk_w32(eth, RST_GL_PSE, MTK_RST_GL); ++ mtk_w32(eth, 0, MTK_RST_GL); ++} ++ + static int mtk_open(struct net_device *dev) + { + struct mtk_mac *mac = netdev_priv(dev); +@@ -2211,6 +2236,8 @@ + if (err) + return err; + ++ mtk_gdm_config(eth, MTK_GDMA_TO_PDMA); ++ + napi_enable(ð->tx_napi); + napi_enable(ð->rx_napi); + mtk_tx_irq_enable(eth, MTK_TX_DONE_INT); +@@ -2266,6 +2293,8 @@ + if (!refcount_dec_and_test(ð->dma_refcnt)) + return 0; + ++ mtk_gdm_config(eth, MTK_GDMA_DROP_ALL); ++ + mtk_tx_irq_disable(eth, MTK_TX_DONE_INT); + mtk_rx_irq_disable(eth, MTK_RX_DONE_INT); + napi_disable(ð->tx_napi); +@@ -2392,8 +2421,6 @@ + mtk_w32(eth, 0, MTK_QDMA_DELAY_INT); + mtk_tx_irq_disable(eth, ~0); + mtk_rx_irq_disable(eth, ~0); +- mtk_w32(eth, RST_GL_PSE, MTK_RST_GL); +- mtk_w32(eth, 0, MTK_RST_GL); + + /* FE int grouping */ + mtk_w32(eth, MTK_TX_DONE_INT, MTK_PDMA_INT_GRP1); +@@ -2402,19 +2429,6 @@ + mtk_w32(eth, MTK_RX_DONE_INT, MTK_QDMA_INT_GRP2); + mtk_w32(eth, 0x21021000, MTK_FE_INT_GRP); + +- for (i = 0; i < MTK_MAC_COUNT; i++) { +- u32 val = mtk_r32(eth, MTK_GDMA_FWD_CFG(i)); +- +- /* setup the forward port to send frame to PDMA */ +- val &= ~0xffff; +- +- /* Enable RX checksum */ +- val |= MTK_GDMA_ICS_EN | MTK_GDMA_TCS_EN | MTK_GDMA_UCS_EN; +- +- /* setup the mac dma */ +- mtk_w32(eth, val, MTK_GDMA_FWD_CFG(i)); +- } +- + return 0; + + err_disable_pm: +diff -urN a/drivers/net/ethernet/mediatek/mtk_eth_soc.h b/drivers/net/ethernet/mediatek/mtk_eth_soc.h +--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.h 2020-04-21 14:33:10.702640743 +0800 ++++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.h 2020-04-21 14:33:24.902141220 +0800 +@@ -84,6 +84,8 @@ + #define MTK_GDMA_ICS_EN BIT(22) + #define MTK_GDMA_TCS_EN BIT(21) + #define MTK_GDMA_UCS_EN BIT(20) ++#define MTK_GDMA_TO_PDMA 0x0 ++#define MTK_GDMA_DROP_ALL 0x7777 + + /* Unicast Filter MAC Address Register - Low */ + #define MTK_GDMA_MAC_ADRL(x) (0x508 + (x * 0x1000)) diff --git a/target/linux/mediatek/patches-5.4/1001-eth-mtk-disable-TBDDONE-support.patch b/target/linux/mediatek/patches-5.4/1001-eth-mtk-disable-TBDDONE-support.patch new file mode 100644 index 0000000000..14c2e12a27 --- /dev/null +++ b/target/linux/mediatek/patches-5.4/1001-eth-mtk-disable-TBDDONE-support.patch @@ -0,0 +1,25 @@ +diff -urN a/drivers/net/ethernet/mediatek/mtk_eth_soc.c b/drivers/net/ethernet/mediatek/mtk_eth_soc.c +--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c 2020-04-21 14:33:05.702816632 +0800 ++++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c 2020-04-21 14:33:19.590328084 +0800 +@@ -1345,10 +1345,11 @@ + u32 next_cpu = desc->txd2; + int mac = 0; + +- desc = mtk_qdma_phys_to_virt(ring, desc->txd2); + if ((desc->txd3 & TX_DMA_OWNER_CPU) == 0) + break; + ++ desc = mtk_qdma_phys_to_virt(ring, desc->txd2); ++ + tx_buf = mtk_desc_to_tx_buf(ring, desc); + if (tx_buf->flags & MTK_TX_FLAGS_FPORT1) + mac = 1; +@@ -2172,7 +2173,7 @@ + + if (MTK_HAS_CAPS(eth->soc->caps, MTK_QDMA)) { + mtk_w32(eth, +- MTK_TX_WB_DDONE | MTK_TX_DMA_EN | ++ MTK_TX_DMA_EN | + MTK_DMA_SIZE_16DWORDS | MTK_NDP_CO_PRO | + MTK_RX_DMA_EN | MTK_RX_2B_OFFSET | + MTK_RX_BT_32DWORDS, |