aboutsummaryrefslogtreecommitdiffstats
path: root/target/linux/mediatek/patches-5.4/1000-eth-gdm-config-backport.patch
diff options
context:
space:
mode:
Diffstat (limited to 'target/linux/mediatek/patches-5.4/1000-eth-gdm-config-backport.patch')
-rw-r--r--target/linux/mediatek/patches-5.4/1000-eth-gdm-config-backport.patch92
1 files changed, 0 insertions, 92 deletions
diff --git a/target/linux/mediatek/patches-5.4/1000-eth-gdm-config-backport.patch b/target/linux/mediatek/patches-5.4/1000-eth-gdm-config-backport.patch
deleted file mode 100644
index a2acadfd90..0000000000
--- a/target/linux/mediatek/patches-5.4/1000-eth-gdm-config-backport.patch
+++ /dev/null
@@ -1,92 +0,0 @@
---- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c
-+++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c
-@@ -2240,6 +2240,31 @@ static int mtk_start_dma(struct mtk_eth
- return 0;
- }
-
-+static void mtk_gdm_config(struct mtk_eth *eth, u32 config)
-+{
-+ int i;
-+
-+ if (MTK_HAS_CAPS(eth->soc->caps, MTK_SOC_MT7628))
-+ return;
-+
-+ for (i = 0; i < MTK_MAC_COUNT; i++) {
-+ u32 val = mtk_r32(eth, MTK_GDMA_FWD_CFG(i));
-+
-+ /* default setup the forward port to send frame to PDMA */
-+ val &= ~0xffff;
-+
-+ /* Enable RX checksum */
-+ val |= MTK_GDMA_ICS_EN | MTK_GDMA_TCS_EN | MTK_GDMA_UCS_EN;
-+
-+ val |= config;
-+
-+ mtk_w32(eth, val, MTK_GDMA_FWD_CFG(i));
-+ }
-+ /* Reset and enable PSE */
-+ mtk_w32(eth, RST_GL_PSE, MTK_RST_GL);
-+ mtk_w32(eth, 0, MTK_RST_GL);
-+}
-+
- static int mtk_open(struct net_device *dev)
- {
- struct mtk_mac *mac = netdev_priv(dev);
-@@ -2260,6 +2285,8 @@ static int mtk_open(struct net_device *d
- if (err)
- return err;
-
-+ mtk_gdm_config(eth, MTK_GDMA_TO_PDMA);
-+
- napi_enable(&eth->tx_napi);
- napi_enable(&eth->rx_napi);
- mtk_tx_irq_enable(eth, MTK_TX_DONE_INT);
-@@ -2315,6 +2342,8 @@ static int mtk_stop(struct net_device *d
- if (!refcount_dec_and_test(&eth->dma_refcnt))
- return 0;
-
-+ mtk_gdm_config(eth, MTK_GDMA_DROP_ALL);
-+
- mtk_tx_irq_disable(eth, MTK_TX_DONE_INT);
- mtk_rx_irq_disable(eth, MTK_RX_DONE_INT);
- napi_disable(&eth->tx_napi);
-@@ -2498,8 +2527,6 @@ static int mtk_hw_init(struct mtk_eth *e
- /* disable delay and normal interrupt */
- mtk_tx_irq_disable(eth, ~0);
- mtk_rx_irq_disable(eth, ~0);
-- mtk_w32(eth, RST_GL_PSE, MTK_RST_GL);
-- mtk_w32(eth, 0, MTK_RST_GL);
-
- /* FE int grouping */
- mtk_w32(eth, MTK_TX_DONE_INT, MTK_PDMA_INT_GRP1);
-@@ -2508,19 +2535,6 @@ static int mtk_hw_init(struct mtk_eth *e
- mtk_w32(eth, MTK_RX_DONE_INT, MTK_QDMA_INT_GRP2);
- mtk_w32(eth, 0x21021000, MTK_FE_INT_GRP);
-
-- for (i = 0; i < MTK_MAC_COUNT; i++) {
-- u32 val = mtk_r32(eth, MTK_GDMA_FWD_CFG(i));
--
-- /* setup the forward port to send frame to PDMA */
-- val &= ~0xffff;
--
-- /* Enable RX checksum */
-- val |= MTK_GDMA_ICS_EN | MTK_GDMA_TCS_EN | MTK_GDMA_UCS_EN;
--
-- /* setup the mac dma */
-- mtk_w32(eth, val, MTK_GDMA_FWD_CFG(i));
-- }
--
- return 0;
-
- err_disable_pm:
---- a/drivers/net/ethernet/mediatek/mtk_eth_soc.h
-+++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.h
-@@ -85,6 +85,8 @@
- #define MTK_GDMA_ICS_EN BIT(22)
- #define MTK_GDMA_TCS_EN BIT(21)
- #define MTK_GDMA_UCS_EN BIT(20)
-+#define MTK_GDMA_TO_PDMA 0x0
-+#define MTK_GDMA_DROP_ALL 0x7777
-
- /* Unicast Filter MAC Address Register - Low */
- #define MTK_GDMA_MAC_ADRL(x) (0x508 + (x * 0x1000))