1 files changed, 0 insertions, 96 deletions
diff --git a/target/linux/mediatek/patches-4.14/0217-arm64-dts-mt7622-add-flash-related-device-nodes.patch b/target/linux/mediatek/patches-4.14/0217-arm64-dts-mt7622-add-flash-related-device-nodes.patch
deleted file mode 100644
index 85812878ab..0000000000
--- a/target/linux/mediatek/patches-4.14/0217-arm64-dts-mt7622-add-flash-related-device-nodes.patch
+++ /dev/null
@@ -1,96 +0,0 @@
-From 0a84c72d1c606129b8af670cbcc73be4168ab753 Mon Sep 17 00:00:00 2001
-From: Sean Wang <sean.wang@mediatek.com>
-Date: Fri, 29 Dec 2017 10:36:37 +0800
-Subject: [PATCH 217/224] arm64: dts: mt7622: add flash related device nodes
-
-add nodes for NOR flash, parallel Nand flash with error correction code
-support.
-
-Signed-off-by: Sean Wang <sean.wang@mediatek.com>
-Cc: RogerCC Lin <rogercc.lin@mediatek.com>
-Cc: Guochun Mao <guochun.mao@mediatek.com>
----
- arch/arm64/boot/dts/mediatek/mt7622-rfb1.dts | 21 +++++++++++++++++
- arch/arm64/boot/dts/mediatek/mt7622.dtsi     | 34 ++++++++++++++++++++++++++++
- 2 files changed, 55 insertions(+)
-
---- a/arch/arm64/boot/dts/mediatek/mt7622-rfb1.dts
-+++ b/arch/arm64/boot/dts/mediatek/mt7622-rfb1.dts
-@@ -235,6 +235,10 @@
- 	};
- };
- 
-+&bch {
-+	status = "disabled";
-+};
-+
- &btif {
- 	status = "okay";
- };
-@@ -257,6 +261,23 @@
- 	status = "okay";
- };
- 
-+&nandc {
-+	pinctrl-names = "default";
-+	pinctrl-0 = <&parallel_nand_pins>;
-+	status = "disabled";
-+};
-+
-+&nor_flash {
-+	pinctrl-names = "default";
-+	pinctrl-0 = <&spi_nor_pins>;
-+	status = "disabled";
-+
-+	flash@0 {
-+		compatible = "jedec,spi-nor";
-+		reg = <0>;
-+	};
-+};
-+
- &pwm {
- 	pinctrl-names = "default";
- 	pinctrl-0 = <&pwm7_pins>;
---- a/arch/arm64/boot/dts/mediatek/mt7622.dtsi
-+++ b/arch/arm64/boot/dts/mediatek/mt7622.dtsi
-@@ -468,6 +468,40 @@
- 		status = "disabled";
- 	};
- 
-+	nandc: nfi@1100d000 {
-+		compatible = "mediatek,mt7622-nfc";
-+		reg = <0 0x1100D000 0 0x1000>;
-+		interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_LOW>;
-+		clocks = <&pericfg CLK_PERI_NFI_PD>,
-+			 <&pericfg CLK_PERI_SNFI_PD>;
-+		clock-names = "nfi_clk", "pad_clk";
-+		ecc-engine = <&bch>;
-+		#address-cells = <1>;
-+		#size-cells = <0>;
-+		status = "disabled";
-+	};
-+
-+	bch: ecc@1100e000 {
-+		compatible = "mediatek,mt7622-ecc";
-+		reg = <0 0x1100e000 0 0x1000>;
-+		interrupts = <GIC_SPI 95 IRQ_TYPE_LEVEL_LOW>;
-+		clocks = <&pericfg CLK_PERI_NFIECC_PD>;
-+		clock-names = "nfiecc_clk";
-+		status = "disabled";
-+	};
-+
-+	nor_flash: spi@11014000 {
-+		compatible = "mediatek,mt7622-nor",
-+			     "mediatek,mt8173-nor";
-+		reg = <0 0x11014000 0 0xe0>;
-+		clocks = <&pericfg CLK_PERI_FLASH_PD>,
-+			 <&topckgen CLK_TOP_FLASH_SEL>;
-+		clock-names = "spi", "sf";
-+		#address-cells = <1>;
-+		#size-cells = <0>;
-+		status = "disabled";
-+	};
-+
- 	spi1: spi@11016000 {
- 		compatible = "mediatek,mt7622-spi";
- 		reg = <0 0x11016000 0 0x100>;