diff options
Diffstat (limited to 'target/linux/mediatek/dts')
3 files changed, 299 insertions, 0 deletions
diff --git a/target/linux/mediatek/dts/mt7981b-xiaomi-mi-router-wr30u-stock.dts b/target/linux/mediatek/dts/mt7981b-xiaomi-mi-router-wr30u-stock.dts new file mode 100644 index 0000000000..7faa6e84ef --- /dev/null +++ b/target/linux/mediatek/dts/mt7981b-xiaomi-mi-router-wr30u-stock.dts @@ -0,0 +1,34 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT + +/dts-v1/; +#include "mt7981b-xiaomi-mi-router-wr30u.dtsi" + +/ { + model = "Xiaomi Mi Router WR30U (stock layout)"; + compatible = "xiaomi,mi-router-wr30u-stock", "mediatek,mt7981"; +}; + +&spi_nand { + mediatek,nmbm; + mediatek,bmt-max-ratio = <1>; + mediatek,bmt-max-reserved-blocks = <64>; +}; + +&partitions { + // ubi_kernel is the ubi partition in stock. + partition@600000 { + label = "ubi_kernel"; + reg = <0x600000 0x2200000>; + }; + + /* ubi is the result of squashing + * consecutive stock partitions: + * - ubi1 + * - overlay + * - data + */ + partition@2800000 { + label = "ubi"; + reg = <0x2800000 0x4e00000>; + }; +}; diff --git a/target/linux/mediatek/dts/mt7981b-xiaomi-mi-router-wr30u-ubootmod.dts b/target/linux/mediatek/dts/mt7981b-xiaomi-mi-router-wr30u-ubootmod.dts new file mode 100644 index 0000000000..6d0f3feb45 --- /dev/null +++ b/target/linux/mediatek/dts/mt7981b-xiaomi-mi-router-wr30u-ubootmod.dts @@ -0,0 +1,16 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT + +/dts-v1/; +#include "mt7981b-xiaomi-mi-router-wr30u.dtsi" + +/ { + model = "Xiaomi Mi Router WR30U (OpenWrt U-Boot layout)"; + compatible = "xiaomi,mi-router-wr30u-ubootmod", "mediatek,mt7981"; +}; + +&partitions { + partition@600000 { + label = "ubi"; + reg = <0x600000 0x7000000>; + }; +}; diff --git a/target/linux/mediatek/dts/mt7981b-xiaomi-mi-router-wr30u.dtsi b/target/linux/mediatek/dts/mt7981b-xiaomi-mi-router-wr30u.dtsi new file mode 100644 index 0000000000..9467b18a7e --- /dev/null +++ b/target/linux/mediatek/dts/mt7981b-xiaomi-mi-router-wr30u.dtsi @@ -0,0 +1,249 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT + +/dts-v1/; +#include <dt-bindings/input/input.h> +#include <dt-bindings/gpio/gpio.h> + +#include "mt7981.dtsi" + +/ { + aliases { + serial0 = &uart0; + led-boot = &led_system_yellow; + led-failsafe = &led_system_yellow; + led-running = &led_system_blue; + led-upgrade = &led_system_yellow; + }; + + chosen { + stdout-path = "serial0:115200n8"; + }; + + memory { + reg = <0 0x40000000 0 0x10000000>; + }; + + gpio-keys { + compatible = "gpio-keys"; + + reset { + label = "reset"; + gpios = <&pio 1 GPIO_ACTIVE_LOW>; + linux,code = <KEY_RESTART>; + }; + + mesh { + label = "mesh"; + gpios = <&pio 0 GPIO_ACTIVE_LOW>; + linux,code = <BTN_9>; + linux,input-type = <EV_SW>; + }; + }; + + leds { + compatible = "gpio-leds"; + + led_system_blue: system_blue { + label = "blue:system"; + gpios = <&pio 9 GPIO_ACTIVE_LOW>; + }; + + led_system_yellow: system_yellow { + label = "yellow:system"; + gpios = <&pio 10 GPIO_ACTIVE_LOW>; + }; + + led_network_blue { + label = "blue:network"; + gpios = <&pio 11 GPIO_ACTIVE_LOW>; + }; + + led_network_yellow { + label = "yellow:network"; + gpios = <&pio 12 GPIO_ACTIVE_LOW>; + }; + }; +}; + +ð { + status = "okay"; + + gmac0: mac@0 { + compatible = "mediatek,eth-mac"; + reg = <0>; + phy-mode = "2500base-x"; + + nvmem-cells = <&macaddr_factory_4>; + nvmem-cell-names = "mac-address"; + mac-address-increment = <(-1)>; + + fixed-link { + speed = <2500>; + full-duplex; + pause; + }; + }; +}; + +&mdio_bus { + switch: switch@0 { + compatible = "mediatek,mt7531"; + reg = <31>; + reset-gpios = <&pio 39 GPIO_ACTIVE_HIGH>; + interrupt-controller; + #interrupt-cells = <1>; + interrupt-parent = <&pio>; + interrupts = <38 IRQ_TYPE_LEVEL_HIGH>; + }; +}; + +&switch { + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + label = "wan"; + }; + + port@1 { + reg = <1>; + label = "lan2"; + }; + + port@2 { + reg = <2>; + label = "lan3"; + }; + + port@3 { + reg = <3>; + label = "lan4"; + }; + + port@6 { + reg = <6>; + ethernet = <&gmac0>; + phy-mode = "2500base-x"; + + fixed-link { + speed = <2500>; + full-duplex; + pause; + }; + }; + }; +}; + +&spi0 { + pinctrl-names = "default"; + pinctrl-0 = <&spi0_flash_pins>; + status = "okay"; + + spi_nand: flash@0 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "spi-nand"; + reg = <0>; + + spi-max-frequency = <52000000>; + spi-tx-buswidth = <4>; + spi-rx-buswidth = <4>; + + partitions: partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + label = "BL2"; + reg = <0x00 0x100000>; + read-only; + }; + + partition@100000 { + label = "Nvram"; + reg = <0x100000 0x40000>; + }; + + partition@140000 { + label = "Bdata"; + reg = <0x140000 0x40000>; + }; + + factory: partition@180000 { + label = "Factory"; + reg = <0x180000 0x200000>; + read-only; + + compatible = "nvmem-cells"; + #address-cells = <1>; + #size-cells = <1>; + + macaddr_factory_4: macaddr@4 { + reg = <0x4 0x6>; + }; + }; + + partition@380000 { + label = "FIP"; + reg = <0x380000 0x200000>; + read-only; + }; + + partition@580000 { + label = "crash"; + reg = <0x580000 0x40000>; + read-only; + }; + + partition@5c0000 { + label = "crash_log"; + reg = <0x5c0000 0x40000>; + read-only; + }; + + partition@7600000 { + label = "KF"; + reg = <0x7600000 0x40000>; + read-only; + }; + }; + }; +}; + +&pio { + spi0_flash_pins: spi0-pins { + mux { + function = "spi"; + groups = "spi0", "spi0_wp_hold"; + }; + + conf-pu { + pins = "SPI0_CS", "SPI0_HOLD", "SPI0_WP"; + drive-strength = <MTK_DRIVE_8mA>; + bias-pull-up = <MTK_PUPD_SET_R1R0_11>; + }; + + conf-pd { + pins = "SPI0_CLK", "SPI0_MOSI", "SPI0_MISO"; + drive-strength = <MTK_DRIVE_8mA>; + bias-pull-down = <MTK_PUPD_SET_R1R0_11>; + }; + }; +}; + +&wifi { + status = "okay"; + + mediatek,mtd-eeprom = <&factory 0x0>; +}; + +&uart0 { + status = "okay"; +}; + +&watchdog { + status = "okay"; +}; |