diff options
Diffstat (limited to 'target/linux/layerscape/patches-5.4/820-usb-0024-LF-387-1-Revert-usb-dwc3-Add-cache-type-configuratio.patch')
| -rw-r--r-- | target/linux/layerscape/patches-5.4/820-usb-0024-LF-387-1-Revert-usb-dwc3-Add-cache-type-configuratio.patch | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/target/linux/layerscape/patches-5.4/820-usb-0024-LF-387-1-Revert-usb-dwc3-Add-cache-type-configuratio.patch b/target/linux/layerscape/patches-5.4/820-usb-0024-LF-387-1-Revert-usb-dwc3-Add-cache-type-configuratio.patch index 52c60b0690..8b31ae897e 100644 --- a/target/linux/layerscape/patches-5.4/820-usb-0024-LF-387-1-Revert-usb-dwc3-Add-cache-type-configuratio.patch +++ b/target/linux/layerscape/patches-5.4/820-usb-0024-LF-387-1-Revert-usb-dwc3-Add-cache-type-configuratio.patch @@ -15,7 +15,7 @@ Signed-off-by: Ran Wang <ran.wang_1@nxp.com> --- a/drivers/usb/dwc3/core.c +++ b/drivers/usb/dwc3/core.c -@@ -913,54 +913,6 @@ static void dwc3_set_power_down_clk_scal +@@ -919,54 +919,6 @@ static void dwc3_set_power_down_clk_scal dwc3_writel(dwc->regs, DWC3_GCTL, reg); } @@ -70,7 +70,7 @@ Signed-off-by: Ran Wang <ran.wang_1@nxp.com> /** * dwc3_core_init - Low-level initialization of DWC3 Core * @dwc: Pointer to our controller context structure -@@ -1021,10 +973,6 @@ static int dwc3_core_init(struct dwc3 *d +@@ -1027,10 +979,6 @@ static int dwc3_core_init(struct dwc3 *d dwc3_set_incr_burst_type(dwc); @@ -81,7 +81,7 @@ Signed-off-by: Ran Wang <ran.wang_1@nxp.com> usb_phy_set_suspend(dwc->usb2_phy, 0); usb_phy_set_suspend(dwc->usb3_phy, 0); ret = phy_power_on(dwc->usb2_generic_phy); -@@ -1947,9 +1895,12 @@ static const struct dev_pm_ops dwc3_dev_ +@@ -1972,9 +1920,12 @@ static const struct dev_pm_ops dwc3_dev_ #ifdef CONFIG_OF static const struct of_device_id of_dwc3_match[] = { @@ -99,7 +99,7 @@ Signed-off-by: Ran Wang <ran.wang_1@nxp.com> MODULE_DEVICE_TABLE(of, of_dwc3_match); --- a/drivers/usb/dwc3/core.h +++ b/drivers/usb/dwc3/core.h -@@ -166,21 +166,6 @@ +@@ -167,21 +167,6 @@ /* Bit fields */ /* Global SoC Bus Configuration INCRx Register 0 */ |