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Diffstat (limited to 'target/linux/layerscape/patches-5.4/820-usb-0016-MLK-16735-usb-host-add-XHCI_CDNS_HOST-flag.patch')
-rw-r--r--target/linux/layerscape/patches-5.4/820-usb-0016-MLK-16735-usb-host-add-XHCI_CDNS_HOST-flag.patch42
1 files changed, 42 insertions, 0 deletions
diff --git a/target/linux/layerscape/patches-5.4/820-usb-0016-MLK-16735-usb-host-add-XHCI_CDNS_HOST-flag.patch b/target/linux/layerscape/patches-5.4/820-usb-0016-MLK-16735-usb-host-add-XHCI_CDNS_HOST-flag.patch
new file mode 100644
index 0000000000..f21f7009d5
--- /dev/null
+++ b/target/linux/layerscape/patches-5.4/820-usb-0016-MLK-16735-usb-host-add-XHCI_CDNS_HOST-flag.patch
@@ -0,0 +1,42 @@
+From a9f1d7994a9f8a38fdace19454ef031244e24e5e Mon Sep 17 00:00:00 2001
+From: Peter Chen <peter.chen@nxp.com>
+Date: Thu, 9 Nov 2017 16:58:40 +0800
+Subject: [PATCH] MLK-16735 usb: host: add XHCI_CDNS_HOST flag
+
+The NXP Cadence XHCI host has the same issue with Intel's,
+it is triggered by reboot test, the test case is described
+at this jira ticket.
+
+BuildInfo:
+- SCFW 8dcff26, IMX-MKIMAGE ea027c4b, ATF
+- U-Boot 2017.03-imx_v2017.03_4.9.51_imx8_beta1+g6dc7b0f
+
+Acked-by: Jun Li <jun.li@nxp.com>
+Signed-off-by: Peter Chen <peter.chen@nxp.com>
+(cherry picked from commit 5e353132931b9dc6e05f6bea1281ae35dd6a59d8)
+---
+ drivers/usb/host/xhci.c | 2 +-
+ drivers/usb/host/xhci.h | 1 +
+ 2 files changed, 2 insertions(+), 1 deletion(-)
+
+--- a/drivers/usb/host/xhci.c
++++ b/drivers/usb/host/xhci.c
+@@ -193,7 +193,7 @@ int xhci_reset(struct xhci_hcd *xhci)
+ * Without this delay, the subsequent HC register access,
+ * may result in a system hang very rarely.
+ */
+- if (xhci->quirks & XHCI_INTEL_HOST)
++ if (xhci->quirks & (XHCI_INTEL_HOST | XHCI_CDNS_HOST))
+ udelay(1000);
+
+ ret = xhci_handshake(&xhci->op_regs->command,
+--- a/drivers/usb/host/xhci.h
++++ b/drivers/usb/host/xhci.h
+@@ -1872,6 +1872,7 @@ struct xhci_hcd {
+ #define XHCI_DEFAULT_PM_RUNTIME_ALLOW BIT_ULL(33)
+ #define XHCI_RESET_PLL_ON_DISCONNECT BIT_ULL(34)
+ #define XHCI_SNPS_BROKEN_SUSPEND BIT_ULL(35)
++#define XHCI_CDNS_HOST BIT_ULL(36)
+
+ unsigned int num_active_eps;
+ unsigned int limit_active_eps;