diff options
Diffstat (limited to 'target/linux/layerscape/patches-5.4/813-pm-0002-fsl_pmc-update-device-bindings.patch')
| -rw-r--r-- | target/linux/layerscape/patches-5.4/813-pm-0002-fsl_pmc-update-device-bindings.patch | 98 |
1 files changed, 98 insertions, 0 deletions
diff --git a/target/linux/layerscape/patches-5.4/813-pm-0002-fsl_pmc-update-device-bindings.patch b/target/linux/layerscape/patches-5.4/813-pm-0002-fsl_pmc-update-device-bindings.patch new file mode 100644 index 0000000000..988971009e --- /dev/null +++ b/target/linux/layerscape/patches-5.4/813-pm-0002-fsl_pmc-update-device-bindings.patch @@ -0,0 +1,98 @@ +From f48ec27500239c0400114327ecbbfec34bfc2deb Mon Sep 17 00:00:00 2001 +From: Li Yang <leoli@freescale.com> +Date: Wed, 22 Feb 2012 15:52:50 +0000 +Subject: [PATCH] fsl_pmc: update device bindings + +Signed-off-by: Li Yang <leoyang.li@nxp.com> +Signed-off-by: Zhao Chenhui <chenhui.zhao@nxp.com> +Signed-off-by: Ran Wang <ran.wang_1@nxp.com> +--- + .../devicetree/bindings/powerpc/fsl/pmc.txt | 59 +++++++++++++--------- + 1 file changed, 34 insertions(+), 25 deletions(-) + +--- a/Documentation/devicetree/bindings/powerpc/fsl/pmc.txt ++++ b/Documentation/devicetree/bindings/powerpc/fsl/pmc.txt +@@ -9,15 +9,20 @@ Properties: + + "fsl,mpc8548-pmc" should be listed for any chip whose PMC is + compatible. "fsl,mpc8536-pmc" should also be listed for any chip +- whose PMC is compatible, and implies deep-sleep capability. ++ whose PMC is compatible, and implies deep-sleep capability and ++ wake on user defined packet(wakeup on ARP). ++ ++ "fsl,p1022-pmc" should be listed for any chip whose PMC is ++ compatible, and implies lossless Ethernet capability during sleep. + + "fsl,mpc8641d-pmc" should be listed for any chip whose PMC is + compatible; all statements below that apply to "fsl,mpc8548-pmc" also + apply to "fsl,mpc8641d-pmc". + + Compatibility does not include bit assignments in SCCR/PMCDR/DEVDISR; these +- bit assignments are indicated via the sleep specifier in each device's +- sleep property. ++ bit assignments are indicated via the clock nodes. Device which has a ++ controllable clock source should have a "fsl,pmc-handle" property pointing ++ to the clock node. + + - reg: For devices compatible with "fsl,mpc8349-pmc", the first resource + is the PMC block, and the second resource is the Clock Configuration +@@ -33,31 +38,35 @@ Properties: + this is a phandle to an "fsl,gtm" node on which timer 4 can be used as + a wakeup source from deep sleep. + +-Sleep specifiers: +- +- fsl,mpc8349-pmc: Sleep specifiers consist of one cell. For each bit +- that is set in the cell, the corresponding bit in SCCR will be saved +- and cleared on suspend, and restored on resume. This sleep controller +- supports disabling and resuming devices at any time. +- +- fsl,mpc8536-pmc: Sleep specifiers consist of three cells, the third of +- which will be ORed into PMCDR upon suspend, and cleared from PMCDR +- upon resume. The first two cells are as described for fsl,mpc8578-pmc. +- This sleep controller only supports disabling devices during system +- sleep, or permanently. +- +- fsl,mpc8548-pmc: Sleep specifiers consist of one or two cells, the +- first of which will be ORed into DEVDISR (and the second into +- DEVDISR2, if present -- this cell should be zero or absent if the +- hardware does not have DEVDISR2) upon a request for permanent device +- disabling. This sleep controller does not support configuring devices +- to disable during system sleep (unless supported by another compatible +- match), or dynamically. ++Clock nodes: ++The clock nodes are to describe the masks in PM controller registers for each ++soc clock. ++- fsl,pmcdr-mask: For "fsl,mpc8548-pmc"-compatible devices, the mask will be ++ ORed into PMCDR before suspend if the device using this clock is the wake-up ++ source and need to be running during low power mode; clear the mask if ++ otherwise. ++ ++- fsl,sccr-mask: For "fsl,mpc8349-pmc"-compatible devices, the corresponding ++ bit specified by the mask in SCCR will be saved and cleared on suspend, and ++ restored on resume. ++ ++- fsl,devdisr-mask: Contain one or two cells, depending on the availability of ++ DEVDISR2 register. For compatible devices, the mask will be ORed into DEVDISR ++ or DEVDISR2 when the clock should be permenently disabled. + + Example: + +- power@b00 { +- compatible = "fsl,mpc8313-pmc", "fsl,mpc8349-pmc"; +- reg = <0xb00 0x100 0xa00 0x100>; +- interrupts = <80 8>; ++ power@e0070 { ++ compatible = "fsl,mpc8536-pmc", "fsl,mpc8548-pmc"; ++ reg = <0xe0070 0x20>; ++ ++ etsec1_clk: soc-clk@24 { ++ fsl,pmcdr-mask = <0x00000080>; ++ }; ++ etsec2_clk: soc-clk@25 { ++ fsl,pmcdr-mask = <0x00000040>; ++ }; ++ etsec3_clk: soc-clk@26 { ++ fsl,pmcdr-mask = <0x00000020>; ++ }; + }; |