diff options
Diffstat (limited to 'target/linux/layerscape/patches-5.4/804-crypto-0015-MLKU-123-1-crypto-caam-add-support-for-i.mx8mm-mn.patch')
| -rw-r--r-- | target/linux/layerscape/patches-5.4/804-crypto-0015-MLKU-123-1-crypto-caam-add-support-for-i.mx8mm-mn.patch | 47 |
1 files changed, 47 insertions, 0 deletions
diff --git a/target/linux/layerscape/patches-5.4/804-crypto-0015-MLKU-123-1-crypto-caam-add-support-for-i.mx8mm-mn.patch b/target/linux/layerscape/patches-5.4/804-crypto-0015-MLKU-123-1-crypto-caam-add-support-for-i.mx8mm-mn.patch new file mode 100644 index 0000000000..def910aaab --- /dev/null +++ b/target/linux/layerscape/patches-5.4/804-crypto-0015-MLKU-123-1-crypto-caam-add-support-for-i.mx8mm-mn.patch @@ -0,0 +1,47 @@ +From 866aab825ad10675b1e98004aec19127ec16b2b3 Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Horia=20Geant=C4=83?= <horia.geanta@nxp.com> +Date: Mon, 23 Sep 2019 14:28:42 +0300 +Subject: [PATCH] MLKU-123-1 crypto: caam - add support for i.mx8mm, mn +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +TODO: + +1. clarify logic wrt. virtualization and DECORSR - see e-mail thread: +"Register-based interface - DECORSR with virtualization disabled" + +2. check whether the clocks are identical for all mScale parts, +and if they do use a single "i.MX8M*" entry in clocks array. + +Signed-off-by: Horia Geantă <horia.geanta@nxp.com> +--- + drivers/crypto/caam/ctrl.c | 8 ++++++-- + 1 file changed, 6 insertions(+), 2 deletions(-) + +--- a/drivers/crypto/caam/ctrl.c ++++ b/drivers/crypto/caam/ctrl.c +@@ -99,10 +99,12 @@ static inline int run_descriptor_deco0(s + + if (ctrlpriv->virt_en == 1 || + /* +- * Apparently on i.MX8MQ it doesn't matter if virt_en == 1 ++ * Apparently on i.MX8MQ, 8MM, 8MN it doesn't matter if virt_en == 1 + * and the following steps should be performed regardless + */ +- of_machine_is_compatible("fsl,imx8mq")) { ++ of_machine_is_compatible("fsl,imx8mq") || ++ of_machine_is_compatible("fsl,imx8mm") || ++ of_machine_is_compatible("fsl,imx8mn")) { + clrsetbits_32(&ctrl->deco_rsr, 0, DECORSR_JR0); + + while (!(rd_reg32(&ctrl->deco_rsr) & DECORSR_VALID) && +@@ -514,6 +516,8 @@ static const struct soc_device_attribute + { .soc_id = "i.MX6*", .data = &caam_imx6_data }, + { .soc_id = "i.MX7*", .data = &caam_imx7_data }, + { .soc_id = "i.MX8MQ", .data = &caam_imx7_data }, ++ { .soc_id = "i.MX8MM", .data = &caam_imx7_data }, ++ { .soc_id = "i.MX8MN", .data = &caam_imx7_data }, + { .family = "Freescale i.MX" }, + { /* sentinel */ } + }; |