diff options
Diffstat (limited to 'target/linux/layerscape/patches-5.4/802-can-0015-can-flexcan-flexcan_read_reg_iflag_rx-optimize-readi.patch')
| -rw-r--r-- | target/linux/layerscape/patches-5.4/802-can-0015-can-flexcan-flexcan_read_reg_iflag_rx-optimize-readi.patch | 68 |
1 files changed, 68 insertions, 0 deletions
diff --git a/target/linux/layerscape/patches-5.4/802-can-0015-can-flexcan-flexcan_read_reg_iflag_rx-optimize-readi.patch b/target/linux/layerscape/patches-5.4/802-can-0015-can-flexcan-flexcan_read_reg_iflag_rx-optimize-readi.patch new file mode 100644 index 0000000000..cf7a6fdcbe --- /dev/null +++ b/target/linux/layerscape/patches-5.4/802-can-0015-can-flexcan-flexcan_read_reg_iflag_rx-optimize-readi.patch @@ -0,0 +1,68 @@ +From 74920ba156136a58dd3411c02d429d4f31497dc0 Mon Sep 17 00:00:00 2001 +From: Marc Kleine-Budde <mkl@pengutronix.de> +Date: Fri, 1 Mar 2019 15:38:05 +0100 +Subject: [PATCH] can: flexcan: flexcan_read_reg_iflag_rx(): optimize reading + +The flexcan IP core has up to 64 mailboxes, each one has a corresponding +interrupt bit in the iflag1 or iflag2 registers and a mask bit in the +imask1 or imask2 registers. + +In the timestamp (i.e. non FIFO) mode the driver needs to mask all non RX +interrupt sources, it uses the precomputed value rx_mask of struct flexcan_priv +for this. + +In certain use cases, for example the CANFD mode, the contents of the iflag2 +register is completely masked. + +This patch optimizes the flexcan_read_reg_iflag_rx() function by not reading +the iflag1 or iflag2 register if the contents is masked. + +Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de> +--- + drivers/net/can/flexcan.c | 28 +++++++++++++++++----------- + 1 file changed, 17 insertions(+), 11 deletions(-) + +--- a/drivers/net/can/flexcan.c ++++ b/drivers/net/can/flexcan.c +@@ -779,6 +779,23 @@ static void flexcan_irq_state(struct net + dev->stats.rx_fifo_errors++; + } + ++static inline u64 flexcan_read64_mask(struct flexcan_priv *priv, void __iomem *addr, u64 mask) ++{ ++ u64 reg = 0; ++ ++ if (upper_32_bits(mask)) ++ reg = (u64)priv->read(addr - 4) << 32; ++ if (lower_32_bits(mask)) ++ reg |= priv->read(addr); ++ ++ return reg & mask; ++} ++ ++static inline u64 flexcan_read_reg_iflag_rx(struct flexcan_priv *priv) ++{ ++ return flexcan_read64_mask(priv, &priv->regs->iflag1, priv->rx_mask); ++} ++ + static inline struct flexcan_priv *rx_offload_to_priv(struct can_rx_offload *offload) + { + return container_of(offload, struct flexcan_priv, offload); +@@ -873,17 +890,6 @@ static struct sk_buff *flexcan_mailbox_r + return skb; + } + +-static inline u64 flexcan_read_reg_iflag_rx(struct flexcan_priv *priv) +-{ +- struct flexcan_regs __iomem *regs = priv->regs; +- u64 iflag; +- +- iflag = (u64)priv->read(®s->iflag2) << 32 | +- priv->read(®s->iflag1); +- +- return iflag & priv->rx_mask; +-} +- + static irqreturn_t flexcan_irq(int irq, void *dev_id) + { + struct net_device *dev = dev_id; |