diff options
Diffstat (limited to 'target/linux/layerscape/patches-5.4/802-can-0009-can-flexcan-rename-macro-FLEXCAN_IFLAG_MB-FLEXCAN_IF.patch')
| -rw-r--r-- | target/linux/layerscape/patches-5.4/802-can-0009-can-flexcan-rename-macro-FLEXCAN_IFLAG_MB-FLEXCAN_IF.patch | 61 |
1 files changed, 61 insertions, 0 deletions
diff --git a/target/linux/layerscape/patches-5.4/802-can-0009-can-flexcan-rename-macro-FLEXCAN_IFLAG_MB-FLEXCAN_IF.patch b/target/linux/layerscape/patches-5.4/802-can-0009-can-flexcan-rename-macro-FLEXCAN_IFLAG_MB-FLEXCAN_IF.patch new file mode 100644 index 0000000000..d67fc9c1c4 --- /dev/null +++ b/target/linux/layerscape/patches-5.4/802-can-0009-can-flexcan-rename-macro-FLEXCAN_IFLAG_MB-FLEXCAN_IF.patch @@ -0,0 +1,61 @@ +From 86608c5578b7a276e0edcedc976c604e283fd177 Mon Sep 17 00:00:00 2001 +From: Marc Kleine-Budde <mkl@pengutronix.de> +Date: Fri, 1 Mar 2019 11:12:13 +0100 +Subject: [PATCH] can: flexcan: rename macro FLEXCAN_IFLAG_MB() -> + FLEXCAN_IFLAG2_MB() + +The macro FLEXCAN_IFLAG_MB() is always used for the iflag2 register, so +rename it to FLEXCAN_IFLAG2_MB() + +Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de> +--- + drivers/net/can/flexcan.c | 10 +++++----- + 1 file changed, 5 insertions(+), 5 deletions(-) + +--- a/drivers/net/can/flexcan.c ++++ b/drivers/net/can/flexcan.c +@@ -142,7 +142,7 @@ + #define FLEXCAN_TX_MB_RESERVED_OFF_FIFO 8 + #define FLEXCAN_TX_MB_RESERVED_OFF_TIMESTAMP 0 + #define FLEXCAN_RX_MB_OFF_TIMESTAMP_FIRST (FLEXCAN_TX_MB_RESERVED_OFF_TIMESTAMP + 1) +-#define FLEXCAN_IFLAG_MB(x) BIT((x) & 0x1f) ++#define FLEXCAN_IFLAG2_MB(x) BIT((x) & 0x1f) + #define FLEXCAN_IFLAG_RX_FIFO_OVERFLOW BIT(7) + #define FLEXCAN_IFLAG_RX_FIFO_WARN BIT(6) + #define FLEXCAN_IFLAG_RX_FIFO_AVAILABLE BIT(5) +@@ -880,7 +880,7 @@ static inline u64 flexcan_read_reg_iflag + u32 iflag1, iflag2; + + iflag2 = priv->read(®s->iflag2) & priv->reg_imask2_default & +- ~FLEXCAN_IFLAG_MB(priv->tx_mb_idx); ++ ~FLEXCAN_IFLAG2_MB(priv->tx_mb_idx); + iflag1 = priv->read(®s->iflag1) & priv->reg_imask1_default; + + return (u64)iflag2 << 32 | iflag1; +@@ -930,7 +930,7 @@ static irqreturn_t flexcan_irq(int irq, + reg_iflag2 = priv->read(®s->iflag2); + + /* transmission complete interrupt */ +- if (reg_iflag2 & FLEXCAN_IFLAG_MB(priv->tx_mb_idx)) { ++ if (reg_iflag2 & FLEXCAN_IFLAG2_MB(priv->tx_mb_idx)) { + u32 reg_ctrl = priv->read(&priv->tx_mb->can_ctrl); + + handled = IRQ_HANDLED; +@@ -942,7 +942,7 @@ static irqreturn_t flexcan_irq(int irq, + /* after sending a RTR frame MB is in RX mode */ + priv->write(FLEXCAN_MB_CODE_TX_INACTIVE, + &priv->tx_mb->can_ctrl); +- priv->write(FLEXCAN_IFLAG_MB(priv->tx_mb_idx), ®s->iflag2); ++ priv->write(FLEXCAN_IFLAG2_MB(priv->tx_mb_idx), ®s->iflag2); + netif_wake_queue(dev); + } + +@@ -1299,7 +1299,7 @@ static int flexcan_open(struct net_devic + priv->tx_mb = flexcan_get_mb(priv, priv->tx_mb_idx); + + priv->reg_imask1_default = 0; +- priv->reg_imask2_default = FLEXCAN_IFLAG_MB(priv->tx_mb_idx); ++ priv->reg_imask2_default = FLEXCAN_IFLAG2_MB(priv->tx_mb_idx); + + priv->offload.mailbox_read = flexcan_mailbox_read; + |