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Diffstat (limited to 'target/linux/layerscape/patches-5.4/701-net-0254-net-mscc-ocelot-filter-out-ocelot-SoC-specific-PCS-c.patch')
-rw-r--r--target/linux/layerscape/patches-5.4/701-net-0254-net-mscc-ocelot-filter-out-ocelot-SoC-specific-PCS-c.patch147
1 files changed, 0 insertions, 147 deletions
diff --git a/target/linux/layerscape/patches-5.4/701-net-0254-net-mscc-ocelot-filter-out-ocelot-SoC-specific-PCS-c.patch b/target/linux/layerscape/patches-5.4/701-net-0254-net-mscc-ocelot-filter-out-ocelot-SoC-specific-PCS-c.patch
deleted file mode 100644
index 73a45bb2d6..0000000000
--- a/target/linux/layerscape/patches-5.4/701-net-0254-net-mscc-ocelot-filter-out-ocelot-SoC-specific-PCS-c.patch
+++ /dev/null
@@ -1,147 +0,0 @@
-From 6960d2c4f5e95ae304a62af249d6c92a2d952601 Mon Sep 17 00:00:00 2001
-From: Claudiu Manoil <claudiu.manoil@nxp.com>
-Date: Thu, 14 Nov 2019 17:03:21 +0200
-Subject: [PATCH] net: mscc: ocelot: filter out ocelot SoC specific PCS config
- from common path
-
-The adjust_link routine should be generic enough to be (re)used by
-any SoC that integrates a switch core compatible with the Ocelot
-core switch driver. Currently all configurations are generic except
-for the PCS settings that are SoC specific. Move these out to the
-Ocelot SoC/board instance.
-
-Signed-off-by: Claudiu Manoil <claudiu.manoil@nxp.com>
-Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
-Reviewed-by: Andrew Lunn <andrew@lunn.ch>
-Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
-Signed-off-by: David S. Miller <davem@davemloft.net>
----
- drivers/net/ethernet/mscc/ocelot.c | 19 ++-----------------
- drivers/net/ethernet/mscc/ocelot.h | 8 +++++++-
- drivers/net/ethernet/mscc/ocelot_board.c | 29 ++++++++++++++++++++++++++++-
- drivers/net/ethernet/mscc/ocelot_regs.c | 3 ++-
- 4 files changed, 39 insertions(+), 20 deletions(-)
-
---- a/drivers/net/ethernet/mscc/ocelot.c
-+++ b/drivers/net/ethernet/mscc/ocelot.c
-@@ -455,23 +455,8 @@ static void ocelot_adjust_link(struct oc
- ocelot_port_writel(ocelot_port, DEV_MAC_HDX_CFG_LATE_COL_POS(67),
- DEV_MAC_HDX_CFG);
-
-- /* Disable HDX fast control */
-- ocelot_port_writel(ocelot_port, DEV_PORT_MISC_HDX_FAST_DIS,
-- DEV_PORT_MISC);
--
-- /* SGMII only for now */
-- ocelot_port_writel(ocelot_port, PCS1G_MODE_CFG_SGMII_MODE_ENA,
-- PCS1G_MODE_CFG);
-- ocelot_port_writel(ocelot_port, PCS1G_SD_CFG_SD_SEL, PCS1G_SD_CFG);
--
-- /* Enable PCS */
-- ocelot_port_writel(ocelot_port, PCS1G_CFG_PCS_ENA, PCS1G_CFG);
--
-- /* No aneg on SGMII */
-- ocelot_port_writel(ocelot_port, 0, PCS1G_ANEG_CFG);
--
-- /* No loopback */
-- ocelot_port_writel(ocelot_port, 0, PCS1G_LB_CFG);
-+ if (ocelot->ops->pcs_init)
-+ ocelot->ops->pcs_init(ocelot, port);
-
- /* Set Max Length and maximum tags allowed */
- ocelot_port_writel(ocelot_port, VLAN_ETH_FRAME_LEN,
---- a/drivers/net/ethernet/mscc/ocelot.h
-+++ b/drivers/net/ethernet/mscc/ocelot.h
-@@ -435,13 +435,19 @@ enum ocelot_tag_prefix {
- };
-
- struct ocelot_port;
-+struct ocelot;
-
- struct ocelot_stat_layout {
- u32 offset;
- char name[ETH_GSTRING_LEN];
- };
-
-+struct ocelot_ops {
-+ void (*pcs_init)(struct ocelot *ocelot, int port);
-+};
-+
- struct ocelot {
-+ const struct ocelot_ops *ops;
- struct device *dev;
-
- struct regmap *targets[TARGET_MAX];
-@@ -553,7 +559,7 @@ struct regmap *ocelot_regmap_init(struct
-
- int ocelot_init(struct ocelot *ocelot);
- void ocelot_deinit(struct ocelot *ocelot);
--int ocelot_chip_init(struct ocelot *ocelot);
-+int ocelot_chip_init(struct ocelot *ocelot, const struct ocelot_ops *ops);
- int ocelot_probe_port(struct ocelot *ocelot, u8 port,
- void __iomem *regs,
- struct phy_device *phy);
---- a/drivers/net/ethernet/mscc/ocelot_board.c
-+++ b/drivers/net/ethernet/mscc/ocelot_board.c
-@@ -262,6 +262,33 @@ static const struct of_device_id mscc_oc
- };
- MODULE_DEVICE_TABLE(of, mscc_ocelot_match);
-
-+static void ocelot_port_pcs_init(struct ocelot *ocelot, int port)
-+{
-+ struct ocelot_port *ocelot_port = ocelot->ports[port];
-+
-+ /* Disable HDX fast control */
-+ ocelot_port_writel(ocelot_port, DEV_PORT_MISC_HDX_FAST_DIS,
-+ DEV_PORT_MISC);
-+
-+ /* SGMII only for now */
-+ ocelot_port_writel(ocelot_port, PCS1G_MODE_CFG_SGMII_MODE_ENA,
-+ PCS1G_MODE_CFG);
-+ ocelot_port_writel(ocelot_port, PCS1G_SD_CFG_SD_SEL, PCS1G_SD_CFG);
-+
-+ /* Enable PCS */
-+ ocelot_port_writel(ocelot_port, PCS1G_CFG_PCS_ENA, PCS1G_CFG);
-+
-+ /* No aneg on SGMII */
-+ ocelot_port_writel(ocelot_port, 0, PCS1G_ANEG_CFG);
-+
-+ /* No loopback */
-+ ocelot_port_writel(ocelot_port, 0, PCS1G_LB_CFG);
-+}
-+
-+static const struct ocelot_ops ocelot_ops = {
-+ .pcs_init = ocelot_port_pcs_init,
-+};
-+
- static int mscc_ocelot_probe(struct platform_device *pdev)
- {
- struct device_node *np = pdev->dev.of_node;
-@@ -323,7 +350,7 @@ static int mscc_ocelot_probe(struct plat
-
- ocelot->targets[HSIO] = hsio;
-
-- err = ocelot_chip_init(ocelot);
-+ err = ocelot_chip_init(ocelot, &ocelot_ops);
- if (err)
- return err;
-
---- a/drivers/net/ethernet/mscc/ocelot_regs.c
-+++ b/drivers/net/ethernet/mscc/ocelot_regs.c
-@@ -423,7 +423,7 @@ static void ocelot_pll5_init(struct ocel
- HSIO_PLL5G_CFG2_AMPC_SEL(0x10));
- }
-
--int ocelot_chip_init(struct ocelot *ocelot)
-+int ocelot_chip_init(struct ocelot *ocelot, const struct ocelot_ops *ops)
- {
- int ret;
-
-@@ -431,6 +431,7 @@ int ocelot_chip_init(struct ocelot *ocel
- ocelot->stats_layout = ocelot_stats_layout;
- ocelot->num_stats = ARRAY_SIZE(ocelot_stats_layout);
- ocelot->shared_queue_sz = 224 * 1024;
-+ ocelot->ops = ops;
-
- ret = ocelot_regfields_init(ocelot, ocelot_regfields);
- if (ret)