diff options
Diffstat (limited to 'target/linux/layerscape/patches-5.4/701-net-0242-net-mscc-ocelot-change-prototypes-of-switchdev-port-.patch')
-rw-r--r-- | target/linux/layerscape/patches-5.4/701-net-0242-net-mscc-ocelot-change-prototypes-of-switchdev-port-.patch | 192 |
1 files changed, 0 insertions, 192 deletions
diff --git a/target/linux/layerscape/patches-5.4/701-net-0242-net-mscc-ocelot-change-prototypes-of-switchdev-port-.patch b/target/linux/layerscape/patches-5.4/701-net-0242-net-mscc-ocelot-change-prototypes-of-switchdev-port-.patch deleted file mode 100644 index dc5847c528..0000000000 --- a/target/linux/layerscape/patches-5.4/701-net-0242-net-mscc-ocelot-change-prototypes-of-switchdev-port-.patch +++ /dev/null @@ -1,192 +0,0 @@ -From 2a07ee2b9608e665872e7d83bebd3acb7e45c2e6 Mon Sep 17 00:00:00 2001 -From: Vladimir Oltean <vladimir.oltean@nxp.com> -Date: Sat, 9 Nov 2019 15:02:51 +0200 -Subject: [PATCH] net: mscc: ocelot: change prototypes of switchdev port - attribute handlers - -This is needed so that the Felix DSA front-end can call the Ocelot -implementations. - -The implementation of the "mc_disabled" switchdev attribute has also -been simplified by using the read-modify-write macro instead of -open-coding that operation. - -Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com> -Signed-off-by: David S. Miller <davem@davemloft.net> ---- - drivers/net/ethernet/mscc/ocelot.c | 88 +++++++++++++++++++------------------- - 1 file changed, 45 insertions(+), 43 deletions(-) - ---- a/drivers/net/ethernet/mscc/ocelot.c -+++ b/drivers/net/ethernet/mscc/ocelot.c -@@ -1282,26 +1282,20 @@ static const struct ethtool_ops ocelot_e - .get_ts_info = ocelot_get_ts_info, - }; - --static int ocelot_port_attr_stp_state_set(struct ocelot_port *ocelot_port, -- struct switchdev_trans *trans, -- u8 state) -+static void ocelot_bridge_stp_state_set(struct ocelot *ocelot, int port, -+ u8 state) - { -- struct ocelot *ocelot = ocelot_port->ocelot; - u32 port_cfg; -- int port, i; -- -- if (switchdev_trans_ph_prepare(trans)) -- return 0; -+ int p, i; - -- if (!(BIT(ocelot_port->chip_port) & ocelot->bridge_mask)) -- return 0; -+ if (!(BIT(port) & ocelot->bridge_mask)) -+ return; - -- port_cfg = ocelot_read_gix(ocelot, ANA_PORT_PORT_CFG, -- ocelot_port->chip_port); -+ port_cfg = ocelot_read_gix(ocelot, ANA_PORT_PORT_CFG, port); - - switch (state) { - case BR_STATE_FORWARDING: -- ocelot->bridge_fwd_mask |= BIT(ocelot_port->chip_port); -+ ocelot->bridge_fwd_mask |= BIT(port); - /* Fallthrough */ - case BR_STATE_LEARNING: - port_cfg |= ANA_PORT_PORT_CFG_LEARN_ENA; -@@ -1309,19 +1303,18 @@ static int ocelot_port_attr_stp_state_se - - default: - port_cfg &= ~ANA_PORT_PORT_CFG_LEARN_ENA; -- ocelot->bridge_fwd_mask &= ~BIT(ocelot_port->chip_port); -+ ocelot->bridge_fwd_mask &= ~BIT(port); - break; - } - -- ocelot_write_gix(ocelot, port_cfg, ANA_PORT_PORT_CFG, -- ocelot_port->chip_port); -+ ocelot_write_gix(ocelot, port_cfg, ANA_PORT_PORT_CFG, port); - - /* Apply FWD mask. The loop is needed to add/remove the current port as - * a source for the other ports. - */ -- for (port = 0; port < ocelot->num_phys_ports; port++) { -- if (ocelot->bridge_fwd_mask & BIT(port)) { -- unsigned long mask = ocelot->bridge_fwd_mask & ~BIT(port); -+ for (p = 0; p < ocelot->num_phys_ports; p++) { -+ if (ocelot->bridge_fwd_mask & BIT(p)) { -+ unsigned long mask = ocelot->bridge_fwd_mask & ~BIT(p); - - for (i = 0; i < ocelot->num_phys_ports; i++) { - unsigned long bond_mask = ocelot->lags[i]; -@@ -1329,7 +1322,7 @@ static int ocelot_port_attr_stp_state_se - if (!bond_mask) - continue; - -- if (bond_mask & BIT(port)) { -+ if (bond_mask & BIT(p)) { - mask &= ~bond_mask; - break; - } -@@ -1337,47 +1330,55 @@ static int ocelot_port_attr_stp_state_se - - ocelot_write_rix(ocelot, - BIT(ocelot->num_phys_ports) | mask, -- ANA_PGID_PGID, PGID_SRC + port); -+ ANA_PGID_PGID, PGID_SRC + p); - } else { - /* Only the CPU port, this is compatible with link - * aggregation. - */ - ocelot_write_rix(ocelot, - BIT(ocelot->num_phys_ports), -- ANA_PGID_PGID, PGID_SRC + port); -+ ANA_PGID_PGID, PGID_SRC + p); - } - } -+} -+ -+static void ocelot_port_attr_stp_state_set(struct ocelot *ocelot, int port, -+ struct switchdev_trans *trans, -+ u8 state) -+{ -+ if (switchdev_trans_ph_prepare(trans)) -+ return; - -- return 0; -+ ocelot_bridge_stp_state_set(ocelot, port, state); - } - --static void ocelot_port_attr_ageing_set(struct ocelot_port *ocelot_port, -+static void ocelot_set_ageing_time(struct ocelot *ocelot, unsigned int msecs) -+{ -+ ocelot_write(ocelot, ANA_AUTOAGE_AGE_PERIOD(msecs / 2), -+ ANA_AUTOAGE); -+} -+ -+static void ocelot_port_attr_ageing_set(struct ocelot *ocelot, int port, - unsigned long ageing_clock_t) - { -- struct ocelot *ocelot = ocelot_port->ocelot; - unsigned long ageing_jiffies = clock_t_to_jiffies(ageing_clock_t); - u32 ageing_time = jiffies_to_msecs(ageing_jiffies) / 1000; - -- ocelot_write(ocelot, ANA_AUTOAGE_AGE_PERIOD(ageing_time / 2), -- ANA_AUTOAGE); -+ ocelot_set_ageing_time(ocelot, ageing_time); - } - --static void ocelot_port_attr_mc_set(struct ocelot_port *port, bool mc) -+static void ocelot_port_attr_mc_set(struct ocelot *ocelot, int port, bool mc) - { -- struct ocelot *ocelot = port->ocelot; -- u32 val = ocelot_read_gix(ocelot, ANA_PORT_CPU_FWD_CFG, -- port->chip_port); -+ u32 cpu_fwd_mcast = ANA_PORT_CPU_FWD_CFG_CPU_IGMP_REDIR_ENA | -+ ANA_PORT_CPU_FWD_CFG_CPU_MLD_REDIR_ENA | -+ ANA_PORT_CPU_FWD_CFG_CPU_IPMC_CTRL_COPY_ENA; -+ u32 val = 0; - - if (mc) -- val |= ANA_PORT_CPU_FWD_CFG_CPU_IGMP_REDIR_ENA | -- ANA_PORT_CPU_FWD_CFG_CPU_MLD_REDIR_ENA | -- ANA_PORT_CPU_FWD_CFG_CPU_IPMC_CTRL_COPY_ENA; -- else -- val &= ~(ANA_PORT_CPU_FWD_CFG_CPU_IGMP_REDIR_ENA | -- ANA_PORT_CPU_FWD_CFG_CPU_MLD_REDIR_ENA | -- ANA_PORT_CPU_FWD_CFG_CPU_IPMC_CTRL_COPY_ENA); -+ val = cpu_fwd_mcast; - -- ocelot_write_gix(ocelot, val, ANA_PORT_CPU_FWD_CFG, port->chip_port); -+ ocelot_rmw_gix(ocelot, val, cpu_fwd_mcast, -+ ANA_PORT_CPU_FWD_CFG, port); - } - - static int ocelot_port_attr_set(struct net_device *dev, -@@ -1386,22 +1387,23 @@ static int ocelot_port_attr_set(struct n - { - struct ocelot_port *ocelot_port = netdev_priv(dev); - struct ocelot *ocelot = ocelot_port->ocelot; -+ int port = ocelot_port->chip_port; - int err = 0; - - switch (attr->id) { - case SWITCHDEV_ATTR_ID_PORT_STP_STATE: -- ocelot_port_attr_stp_state_set(ocelot_port, trans, -+ ocelot_port_attr_stp_state_set(ocelot, port, trans, - attr->u.stp_state); - break; - case SWITCHDEV_ATTR_ID_BRIDGE_AGEING_TIME: -- ocelot_port_attr_ageing_set(ocelot_port, attr->u.ageing_time); -+ ocelot_port_attr_ageing_set(ocelot, port, attr->u.ageing_time); - break; - case SWITCHDEV_ATTR_ID_BRIDGE_VLAN_FILTERING: -- ocelot_port_vlan_filtering(ocelot, ocelot_port->chip_port, -+ ocelot_port_vlan_filtering(ocelot, port, - attr->u.vlan_filtering); - break; - case SWITCHDEV_ATTR_ID_BRIDGE_MC_DISABLED: -- ocelot_port_attr_mc_set(ocelot_port, !attr->u.mc_disabled); -+ ocelot_port_attr_mc_set(ocelot, port, !attr->u.mc_disabled); - break; - default: - err = -EOPNOTSUPP; |