diff options
Diffstat (limited to 'target/linux/layerscape/patches-5.4/302-dts-0089-arm64-dts-ls1028a-Update-the-clock-providers-for-the.patch')
| -rw-r--r-- | target/linux/layerscape/patches-5.4/302-dts-0089-arm64-dts-ls1028a-Update-the-clock-providers-for-the.patch | 55 |
1 files changed, 0 insertions, 55 deletions
diff --git a/target/linux/layerscape/patches-5.4/302-dts-0089-arm64-dts-ls1028a-Update-the-clock-providers-for-the.patch b/target/linux/layerscape/patches-5.4/302-dts-0089-arm64-dts-ls1028a-Update-the-clock-providers-for-the.patch deleted file mode 100644 index 8c2d085665..0000000000 --- a/target/linux/layerscape/patches-5.4/302-dts-0089-arm64-dts-ls1028a-Update-the-clock-providers-for-the.patch +++ /dev/null @@ -1,55 +0,0 @@ -From e13c24ef2f068e651b9996922a08843d53513cab Mon Sep 17 00:00:00 2001 -From: Wen He <wen.he_1@nxp.com> -Date: Fri, 20 Sep 2019 16:34:18 +0800 -Subject: [PATCH] arm64: dts: ls1028a: Update the clock providers for the Mali - DP500 - -In order to maximise performance of the LCD Controller's 64-bit AXI -bus, for any give speed bin of the device, the AXI master interface -clock(ACLK) clock can be up to CPU_frequency/2, which is already -capable of optimal performance. In general, ACLK is always expected -to be equal to CPU_frequency/2. APB slave interface clock(PCLK) and -Main processing clock(PCLK) both are tied to the same clock as ACLK. - -This change followed the LS1028A Architecture Specification Manual. - -Signed-off-by: Wen He <wen.he_1@nxp.com> -Acked-by: Li Yang <leoyang.li@nxp.com> -Signed-off-by: Shawn Guo <shawnguo@kernel.org> ---- - arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi | 17 ++--------------- - 1 file changed, 2 insertions(+), 15 deletions(-) - ---- a/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi -+++ b/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi -@@ -90,20 +90,6 @@ - clocks = <&osc_27m>; - }; - -- aclk: clock-axi { -- compatible = "fixed-clock"; -- #clock-cells = <0>; -- clock-frequency = <650000000>; -- clock-output-names= "aclk"; -- }; -- -- pclk: clock-apb { -- compatible = "fixed-clock"; -- #clock-cells = <0>; -- clock-frequency = <650000000>; -- clock-output-names= "pclk"; -- }; -- - reboot { - compatible ="syscon-reboot"; - regmap = <&rst>; -@@ -860,7 +846,8 @@ - interrupts = <0 222 IRQ_TYPE_LEVEL_HIGH>, - <0 223 IRQ_TYPE_LEVEL_HIGH>; - interrupt-names = "DE", "SE"; -- clocks = <&dpclk 0>, <&aclk>, <&aclk>, <&pclk>; -+ clocks = <&dpclk 0>, <&clockgen 2 2>, <&clockgen 2 2>, -+ <&clockgen 2 2>; - clock-names = "pxlclk", "mclk", "aclk", "pclk"; - arm,malidp-output-port-lines = /bits/ 8 <8 8 8>; - arm,malidp-arqos-value = <0xd000d000>; |