diff options
Diffstat (limited to 'target/linux/layerscape/patches-5.4/302-dts-0052-arm64-dts-fsl-layerscape-fix-warnings-when-compiling.patch')
| -rw-r--r-- | target/linux/layerscape/patches-5.4/302-dts-0052-arm64-dts-fsl-layerscape-fix-warnings-when-compiling.patch | 114 |
1 files changed, 0 insertions, 114 deletions
diff --git a/target/linux/layerscape/patches-5.4/302-dts-0052-arm64-dts-fsl-layerscape-fix-warnings-when-compiling.patch b/target/linux/layerscape/patches-5.4/302-dts-0052-arm64-dts-fsl-layerscape-fix-warnings-when-compiling.patch deleted file mode 100644 index bfe9ce6a45..0000000000 --- a/target/linux/layerscape/patches-5.4/302-dts-0052-arm64-dts-fsl-layerscape-fix-warnings-when-compiling.patch +++ /dev/null @@ -1,114 +0,0 @@ -From 92aff696c8708ff5293eb000e98456e23afe1cb3 Mon Sep 17 00:00:00 2001 -From: Pankaj Bansal <pankaj.bansal@nxp.com> -Date: Mon, 22 Apr 2019 16:43:13 +0530 -Subject: [PATCH] arm64: dts: fsl: layerscape: fix warnings when compiling dts - files - -when compiling dts file using DTC_FLAG='-@', the device tree compiler -reports these warnings: - -Warning (alias_paths): /aliases: aliases property name must include -only lowercase and '-' - -Fixed the node aliases to silence these warnings. - -Signed-off-by: Pankaj Bansal <pankaj.bansal@nxp.com> ---- - arch/arm64/boot/dts/freescale/fsl-ls1043a-qds.dts | 34 +++++++++++------------ - arch/arm64/boot/dts/freescale/fsl-ls1046a-qds.dts | 28 +++++++++---------- - 2 files changed, 31 insertions(+), 31 deletions(-) - ---- a/arch/arm64/boot/dts/freescale/fsl-ls1043a-qds.dts -+++ b/arch/arm64/boot/dts/freescale/fsl-ls1043a-qds.dts -@@ -3,7 +3,7 @@ - * Device Tree Include file for Freescale Layerscape-1043A family SoC. - * - * Copyright 2014-2015 Freescale Semiconductor, Inc. -- * Copyright 2018 NXP -+ * Copyright 2018-2019 NXP - * - * Mingkai Hu <Mingkai.hu@freescale.com> - */ -@@ -24,22 +24,22 @@ - serial1 = &duart1; - serial2 = &duart2; - serial3 = &duart3; -- sgmii_riser_s1_p1 = &sgmii_phy_s1_p1; -- sgmii_riser_s2_p1 = &sgmii_phy_s2_p1; -- sgmii_riser_s3_p1 = &sgmii_phy_s3_p1; -- sgmii_riser_s4_p1 = &sgmii_phy_s4_p1; -- qsgmii_s1_p1 = &qsgmii_phy_s1_p1; -- qsgmii_s1_p2 = &qsgmii_phy_s1_p2; -- qsgmii_s1_p3 = &qsgmii_phy_s1_p3; -- qsgmii_s1_p4 = &qsgmii_phy_s1_p4; -- qsgmii_s2_p1 = &qsgmii_phy_s2_p1; -- qsgmii_s2_p2 = &qsgmii_phy_s2_p2; -- qsgmii_s2_p3 = &qsgmii_phy_s2_p3; -- qsgmii_s2_p4 = &qsgmii_phy_s2_p4; -- emi1_slot1 = &ls1043mdio_s1; -- emi1_slot2 = &ls1043mdio_s2; -- emi1_slot3 = &ls1043mdio_s3; -- emi1_slot4 = &ls1043mdio_s4; -+ sgmii-riser-s1-p1 = &sgmii_phy_s1_p1; -+ sgmii-riser-s2-p1 = &sgmii_phy_s2_p1; -+ sgmii-riser-s3-p1 = &sgmii_phy_s3_p1; -+ sgmii-riser-s4-p1 = &sgmii_phy_s4_p1; -+ qsgmii-s1-p1 = &qsgmii_phy_s1_p1; -+ qsgmii-s1-p2 = &qsgmii_phy_s1_p2; -+ qsgmii-s1-p3 = &qsgmii_phy_s1_p3; -+ qsgmii-s1-p4 = &qsgmii_phy_s1_p4; -+ qsgmii-s2-p1 = &qsgmii_phy_s2_p1; -+ qsgmii-s2-p2 = &qsgmii_phy_s2_p2; -+ qsgmii-s2-p3 = &qsgmii_phy_s2_p3; -+ qsgmii-s2-p4 = &qsgmii_phy_s2_p4; -+ emi1-slot1 = &ls1043mdio_s1; -+ emi1-slot2 = &ls1043mdio_s2; -+ emi1-slot3 = &ls1043mdio_s3; -+ emi1-slot4 = &ls1043mdio_s4; - }; - - chosen { ---- a/arch/arm64/boot/dts/freescale/fsl-ls1046a-qds.dts -+++ b/arch/arm64/boot/dts/freescale/fsl-ls1046a-qds.dts -@@ -3,7 +3,7 @@ - * Device Tree Include file for Freescale Layerscape-1046A family SoC. - * - * Copyright 2016 Freescale Semiconductor, Inc. -- * Copyright 2018 NXP -+ * Copyright 2018-2019 NXP - * - * Shaohui Xie <Shaohui.Xie@nxp.com> - */ -@@ -26,19 +26,19 @@ - serial2 = &duart2; - serial3 = &duart3; - -- emi1_slot1 = &ls1046mdio_s1; -- emi1_slot2 = &ls1046mdio_s2; -- emi1_slot4 = &ls1046mdio_s4; -- -- sgmii_s1_p1 = &sgmii_phy_s1_p1; -- sgmii_s1_p2 = &sgmii_phy_s1_p2; -- sgmii_s1_p3 = &sgmii_phy_s1_p3; -- sgmii_s1_p4 = &sgmii_phy_s1_p4; -- sgmii_s4_p1 = &sgmii_phy_s4_p1; -- qsgmii_s2_p1 = &qsgmii_phy_s2_p1; -- qsgmii_s2_p2 = &qsgmii_phy_s2_p2; -- qsgmii_s2_p3 = &qsgmii_phy_s2_p3; -- qsgmii_s2_p4 = &qsgmii_phy_s2_p4; -+ emi1-slot1 = &ls1046mdio_s1; -+ emi1-slot2 = &ls1046mdio_s2; -+ emi1-slot4 = &ls1046mdio_s4; -+ -+ sgmii-s1-p1 = &sgmii_phy_s1_p1; -+ sgmii-s1-p2 = &sgmii_phy_s1_p2; -+ sgmii-s1-p3 = &sgmii_phy_s1_p3; -+ sgmii-s1-p4 = &sgmii_phy_s1_p4; -+ sgmii-s4-p1 = &sgmii_phy_s4_p1; -+ qsgmii-s2-p1 = &qsgmii_phy_s2_p1; -+ qsgmii-s2-p2 = &qsgmii_phy_s2_p2; -+ qsgmii-s2-p3 = &qsgmii_phy_s2_p3; -+ qsgmii-s2-p4 = &qsgmii_phy_s2_p4; - }; - - chosen { |