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Diffstat (limited to 'target/linux/layerscape/patches-5.4/302-dts-0025-arm64-dts-nxp-ls208xa-add-more-thermal-zone-support.patch')
-rw-r--r--target/linux/layerscape/patches-5.4/302-dts-0025-arm64-dts-nxp-ls208xa-add-more-thermal-zone-support.patch745
1 files changed, 0 insertions, 745 deletions
diff --git a/target/linux/layerscape/patches-5.4/302-dts-0025-arm64-dts-nxp-ls208xa-add-more-thermal-zone-support.patch b/target/linux/layerscape/patches-5.4/302-dts-0025-arm64-dts-nxp-ls208xa-add-more-thermal-zone-support.patch
deleted file mode 100644
index 5434e1f913..0000000000
--- a/target/linux/layerscape/patches-5.4/302-dts-0025-arm64-dts-nxp-ls208xa-add-more-thermal-zone-support.patch
+++ /dev/null
@@ -1,745 +0,0 @@
-From d05cf625f27335320a2ad883b7f7c4cd638dca99 Mon Sep 17 00:00:00 2001
-From: Yuantian Tang <andy.tang@nxp.com>
-Date: Mon, 5 Nov 2018 17:25:32 +0800
-Subject: [PATCH] arm64: dts: nxp: ls208xa: add more thermal zone support
-
-Ls208xa has several thermal sensors. Add all the sensor id to dts
-to enable them.
-
-To make the dts cleaner, re-organize the nodes to split out the
-common part so that it can be shared with other SoCs.
-
-Signed-off-by: Yuantian Tang <andy.tang@nxp.com>
----
- arch/arm64/boot/dts/freescale/fsl-ls2080a.dtsi | 8 +-
- arch/arm64/boot/dts/freescale/fsl-ls2088a.dtsi | 8 +-
- arch/arm64/boot/dts/freescale/fsl-ls208xa.dtsi | 70 ++++---
- arch/arm64/boot/dts/freescale/fsl-tmu-map1.dtsi | 99 ++++++++++
- arch/arm64/boot/dts/freescale/fsl-tmu-map2.dtsi | 99 ++++++++++
- arch/arm64/boot/dts/freescale/fsl-tmu-map3.dtsi | 99 ++++++++++
- arch/arm64/boot/dts/freescale/fsl-tmu.dtsi | 251 ++++++++++++++++++++++++
- 7 files changed, 590 insertions(+), 44 deletions(-)
- create mode 100644 arch/arm64/boot/dts/freescale/fsl-tmu-map1.dtsi
- create mode 100644 arch/arm64/boot/dts/freescale/fsl-tmu-map2.dtsi
- create mode 100644 arch/arm64/boot/dts/freescale/fsl-tmu-map3.dtsi
- create mode 100644 arch/arm64/boot/dts/freescale/fsl-tmu.dtsi
-
---- a/arch/arm64/boot/dts/freescale/fsl-ls2080a.dtsi
-+++ b/arch/arm64/boot/dts/freescale/fsl-ls2080a.dtsi
-@@ -12,7 +12,7 @@
- #include "fsl-ls208xa.dtsi"
-
- &cpu {
-- cpu0: cpu@0 {
-+ cooling_map0: cpu0: cpu@0 {
- device_type = "cpu";
- compatible = "arm,cortex-a57";
- reg = <0x0>;
-@@ -32,7 +32,7 @@
- #cooling-cells = <2>;
- };
-
-- cpu2: cpu@100 {
-+ cooling_map1: cpu2: cpu@100 {
- device_type = "cpu";
- compatible = "arm,cortex-a57";
- reg = <0x100>;
-@@ -52,7 +52,7 @@
- #cooling-cells = <2>;
- };
-
-- cpu4: cpu@200 {
-+ cooling_map2: cpu4: cpu@200 {
- device_type = "cpu";
- compatible = "arm,cortex-a57";
- reg = <0x200>;
-@@ -72,7 +72,7 @@
- #cooling-cells = <2>;
- };
-
-- cpu6: cpu@300 {
-+ cooling_map3: cpu6: cpu@300 {
- device_type = "cpu";
- compatible = "arm,cortex-a57";
- reg = <0x300>;
---- a/arch/arm64/boot/dts/freescale/fsl-ls2088a.dtsi
-+++ b/arch/arm64/boot/dts/freescale/fsl-ls2088a.dtsi
-@@ -12,7 +12,7 @@
- #include "fsl-ls208xa.dtsi"
-
- &cpu {
-- cpu0: cpu@0 {
-+ cooling_map0: cpu0: cpu@0 {
- device_type = "cpu";
- compatible = "arm,cortex-a72";
- reg = <0x0>;
-@@ -32,7 +32,7 @@
- #cooling-cells = <2>;
- };
-
-- cpu2: cpu@100 {
-+ cooling_map1: cpu2: cpu@100 {
- device_type = "cpu";
- compatible = "arm,cortex-a72";
- reg = <0x100>;
-@@ -52,7 +52,7 @@
- #cooling-cells = <2>;
- };
-
-- cpu4: cpu@200 {
-+ cooling_map2: cpu4: cpu@200 {
- device_type = "cpu";
- compatible = "arm,cortex-a72";
- reg = <0x200>;
-@@ -72,7 +72,7 @@
- #cooling-cells = <2>;
- };
-
-- cpu6: cpu@300 {
-+ cooling_map3: cpu6: cpu@300 {
- device_type = "cpu";
- compatible = "arm,cortex-a72";
- reg = <0x300>;
---- a/arch/arm64/boot/dts/freescale/fsl-ls208xa.dtsi
-+++ b/arch/arm64/boot/dts/freescale/fsl-ls208xa.dtsi
-@@ -77,42 +77,7 @@
- mask = <0x2>;
- };
-
-- thermal-zones {
-- cpu_thermal: cpu-thermal {
-- polling-delay-passive = <1000>;
-- polling-delay = <5000>;
--
-- thermal-sensors = <&tmu 4>;
--
-- trips {
-- cpu_alert: cpu-alert {
-- temperature = <75000>;
-- hysteresis = <2000>;
-- type = "passive";
-- };
-- cpu_crit: cpu-crit {
-- temperature = <85000>;
-- hysteresis = <2000>;
-- type = "critical";
-- };
-- };
--
-- cooling-maps {
-- map0 {
-- trip = <&cpu_alert>;
-- cooling-device =
-- <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
-- <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
-- <&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
-- <&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
-- <&cpu4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
-- <&cpu5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
-- <&cpu6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
-- <&cpu7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
-- };
-- };
-- };
-- };
-+ #include "fsl-tmu.dtsi"
-
- timer: timer {
- compatible = "arm,armv8-timer";
-@@ -906,3 +871,36 @@
- };
- };
- };
-+
-+#include "fsl-tmu-map1.dtsi"
-+#include "fsl-tmu-map2.dtsi"
-+#include "fsl-tmu-map3.dtsi"
-+&thermal_zones {
-+ thermal-zone1 {
-+ status = "okay";
-+ };
-+
-+ thermal-zone2{
-+ status = "okay";
-+ };
-+
-+ thermal-zone3{
-+ status = "okay";
-+ };
-+
-+ thermal-zone4{
-+ status = "okay";
-+ };
-+
-+ thermal-zone5{
-+ status = "okay";
-+ };
-+
-+ thermal-zone6{
-+ status = "okay";
-+ };
-+
-+ thermal-zone7 {
-+ status = "okay";
-+ };
-+};
---- /dev/null
-+++ b/arch/arm64/boot/dts/freescale/fsl-tmu-map1.dtsi
-@@ -0,0 +1,99 @@
-+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-+/*
-+ * Device Tree Include file for Thermal Monitor Unit.
-+ *
-+ * Copyright 2018 NXP
-+ *
-+ * Tang Yuantian <andy.tang@nxp.com>
-+ *
-+ */
-+
-+&thermal_zones {
-+ thermal-zone0 {
-+ cooling-maps {
-+ map1 {
-+ trip = <&alert0>;
-+ cooling-device =
-+ <&cooling_map1 THERMAL_NO_LIMIT
-+ THERMAL_NO_LIMIT>;
-+ };
-+ };
-+ };
-+
-+ thermal-zone1 {
-+ cooling-maps {
-+ map1 {
-+ trip = <&alert1>;
-+ cooling-device =
-+ <&cooling_map1 THERMAL_NO_LIMIT
-+ THERMAL_NO_LIMIT>;
-+ };
-+ };
-+ };
-+
-+ thermal-zone2 {
-+ cooling-maps {
-+ map1 {
-+ trip = <&alert2>;
-+ cooling-device =
-+ <&cooling_map1 THERMAL_NO_LIMIT
-+ THERMAL_NO_LIMIT>;
-+ };
-+ };
-+ };
-+
-+ thermal-zone3 {
-+ cooling-maps {
-+ map1 {
-+ trip = <&alert3>;
-+ cooling-device =
-+ <&cooling_map1 THERMAL_NO_LIMIT
-+ THERMAL_NO_LIMIT>;
-+ };
-+ };
-+ };
-+
-+ thermal-zone4 {
-+ cooling-maps {
-+ map1 {
-+ trip = <&alert4>;
-+ cooling-device =
-+ <&cooling_map1 THERMAL_NO_LIMIT
-+ THERMAL_NO_LIMIT>;
-+ };
-+ };
-+ };
-+
-+ thermal-zone5 {
-+ cooling-maps {
-+ map1 {
-+ trip = <&alert5>;
-+ cooling-device =
-+ <&cooling_map1 THERMAL_NO_LIMIT
-+ THERMAL_NO_LIMIT>;
-+ };
-+ };
-+ };
-+
-+ thermal-zone6 {
-+ cooling-maps {
-+ map1 {
-+ trip = <&alert6>;
-+ cooling-device =
-+ <&cooling_map1 THERMAL_NO_LIMIT
-+ THERMAL_NO_LIMIT>;
-+ };
-+ };
-+ };
-+
-+ thermal-zone7 {
-+ cooling-maps {
-+ map1 {
-+ trip = <&alert7>;
-+ cooling-device =
-+ <&cooling_map1 THERMAL_NO_LIMIT
-+ THERMAL_NO_LIMIT>;
-+ };
-+ };
-+ };
-+};
---- /dev/null
-+++ b/arch/arm64/boot/dts/freescale/fsl-tmu-map2.dtsi
-@@ -0,0 +1,99 @@
-+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-+/*
-+ * Device Tree Include file for Thermal Monitor Unit.
-+ *
-+ * Copyright 2018 NXP
-+ *
-+ * Tang Yuantian <andy.tang@nxp.com>
-+ *
-+ */
-+
-+&thermal_zones {
-+ thermal-zone0 {
-+ cooling-maps {
-+ map2 {
-+ trip = <&alert0>;
-+ cooling-device =
-+ <&cooling_map2 THERMAL_NO_LIMIT
-+ THERMAL_NO_LIMIT>;
-+ };
-+ };
-+ };
-+
-+ thermal-zone1 {
-+ cooling-maps {
-+ map2 {
-+ trip = <&alert1>;
-+ cooling-device =
-+ <&cooling_map2 THERMAL_NO_LIMIT
-+ THERMAL_NO_LIMIT>;
-+ };
-+ };
-+ };
-+
-+ thermal-zone2 {
-+ cooling-maps {
-+ map2 {
-+ trip = <&alert2>;
-+ cooling-device =
-+ <&cooling_map2 THERMAL_NO_LIMIT
-+ THERMAL_NO_LIMIT>;
-+ };
-+ };
-+ };
-+
-+ thermal-zone3 {
-+ cooling-maps {
-+ map2 {
-+ trip = <&alert3>;
-+ cooling-device =
-+ <&cooling_map2 THERMAL_NO_LIMIT
-+ THERMAL_NO_LIMIT>;
-+ };
-+ };
-+ };
-+
-+ thermal-zone4 {
-+ cooling-maps {
-+ map2 {
-+ trip = <&alert4>;
-+ cooling-device =
-+ <&cooling_map2 THERMAL_NO_LIMIT
-+ THERMAL_NO_LIMIT>;
-+ };
-+ };
-+ };
-+
-+ thermal-zone5 {
-+ cooling-maps {
-+ map2 {
-+ trip = <&alert5>;
-+ cooling-device =
-+ <&cooling_map2 THERMAL_NO_LIMIT
-+ THERMAL_NO_LIMIT>;
-+ };
-+ };
-+ };
-+
-+ thermal-zone6 {
-+ cooling-maps {
-+ map2 {
-+ trip = <&alert6>;
-+ cooling-device =
-+ <&cooling_map2 THERMAL_NO_LIMIT
-+ THERMAL_NO_LIMIT>;
-+ };
-+ };
-+ };
-+
-+ thermal-zone7 {
-+ cooling-maps {
-+ map2 {
-+ trip = <&alert7>;
-+ cooling-device =
-+ <&cooling_map2 THERMAL_NO_LIMIT
-+ THERMAL_NO_LIMIT>;
-+ };
-+ };
-+ };
-+};
---- /dev/null
-+++ b/arch/arm64/boot/dts/freescale/fsl-tmu-map3.dtsi
-@@ -0,0 +1,99 @@
-+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-+/*
-+ * Device Tree Include file for Thermal Monitor Unit.
-+ *
-+ * Copyright 2018 NXP
-+ *
-+ * Tang Yuantian <andy.tang@nxp.com>
-+ *
-+ */
-+
-+&thermal_zones {
-+ thermal-zone0 {
-+ cooling-maps {
-+ map3 {
-+ trip = <&alert0>;
-+ cooling-device =
-+ <&cooling_map3 THERMAL_NO_LIMIT
-+ THERMAL_NO_LIMIT>;
-+ };
-+ };
-+ };
-+
-+ thermal-zone1 {
-+ cooling-maps {
-+ map3 {
-+ trip = <&alert1>;
-+ cooling-device =
-+ <&cooling_map3 THERMAL_NO_LIMIT
-+ THERMAL_NO_LIMIT>;
-+ };
-+ };
-+ };
-+
-+ thermal-zone2 {
-+ cooling-maps {
-+ map3 {
-+ trip = <&alert2>;
-+ cooling-device =
-+ <&cooling_map3 THERMAL_NO_LIMIT
-+ THERMAL_NO_LIMIT>;
-+ };
-+ };
-+ };
-+
-+ thermal-zone3 {
-+ cooling-maps {
-+ map3 {
-+ trip = <&alert3>;
-+ cooling-device =
-+ <&cooling_map3 THERMAL_NO_LIMIT
-+ THERMAL_NO_LIMIT>;
-+ };
-+ };
-+ };
-+
-+ thermal-zone4 {
-+ cooling-maps {
-+ map3 {
-+ trip = <&alert4>;
-+ cooling-device =
-+ <&cooling_map3 THERMAL_NO_LIMIT
-+ THERMAL_NO_LIMIT>;
-+ };
-+ };
-+ };
-+
-+ thermal-zone5 {
-+ cooling-maps {
-+ map3 {
-+ trip = <&alert5>;
-+ cooling-device =
-+ <&cooling_map3 THERMAL_NO_LIMIT
-+ THERMAL_NO_LIMIT>;
-+ };
-+ };
-+ };
-+
-+ thermal-zone6 {
-+ cooling-maps {
-+ map3 {
-+ trip = <&alert6>;
-+ cooling-device =
-+ <&cooling_map3 THERMAL_NO_LIMIT
-+ THERMAL_NO_LIMIT>;
-+ };
-+ };
-+ };
-+
-+ thermal-zone7 {
-+ cooling-maps {
-+ map3 {
-+ trip = <&alert7>;
-+ cooling-device =
-+ <&cooling_map3 THERMAL_NO_LIMIT
-+ THERMAL_NO_LIMIT>;
-+ };
-+ };
-+ };
-+};
---- /dev/null
-+++ b/arch/arm64/boot/dts/freescale/fsl-tmu.dtsi
-@@ -0,0 +1,251 @@
-+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-+/*
-+ * Device Tree Include file for Thermal Monitor Unit.
-+ *
-+ * Copyright 2018 NXP
-+ *
-+ * Tang Yuantian <andy.tang@nxp.com>
-+ *
-+ */
-+
-+thermal_zones: thermal-zones {
-+ thermal_zone0: thermal-zone0 {
-+ polling-delay-passive = <1000>;
-+ polling-delay = <5000>;
-+ thermal-sensors = <&tmu 0>;
-+ status = "disabled";
-+
-+ trips {
-+ alert0: alert0 {
-+ temperature = <75000>;
-+ hysteresis = <2000>;
-+ type = "passive";
-+ };
-+
-+ crit0: crit0 {
-+ temperature = <85000>;
-+ hysteresis = <2000>;
-+ type = "critical";
-+ };
-+ };
-+
-+ cooling-maps {
-+ map0 {
-+ trip = <&alert0>;
-+ cooling-device =
-+ <&cooling_map0 THERMAL_NO_LIMIT
-+ THERMAL_NO_LIMIT>;
-+ };
-+ };
-+ };
-+
-+ thermal-zone1 {
-+ polling-delay-passive = <1000>;
-+ polling-delay = <5000>;
-+ thermal-sensors = <&tmu 1>;
-+ status = "disabled";
-+
-+ trips {
-+ alert1: alert1 {
-+ temperature = <75000>;
-+ hysteresis = <2000>;
-+ type = "passive";
-+ };
-+
-+ crit1: crit1 {
-+ temperature = <85000>;
-+ hysteresis = <2000>;
-+ type = "critical";
-+ };
-+ };
-+
-+ cooling-maps {
-+ map0 {
-+ trip = <&alert1>;
-+ cooling-device =
-+ <&cooling_map0 THERMAL_NO_LIMIT
-+ THERMAL_NO_LIMIT>;
-+ };
-+ };
-+ };
-+
-+ thermal-zone2 {
-+ polling-delay-passive = <1000>;
-+ polling-delay = <5000>;
-+ thermal-sensors = <&tmu 2>;
-+ status = "disabled";
-+
-+ trips {
-+ alert2: alert2 {
-+ temperature = <75000>;
-+ hysteresis = <2000>;
-+ type = "passive";
-+ };
-+
-+ crit2: crit2 {
-+ temperature = <85000>;
-+ hysteresis = <2000>;
-+ type = "critical";
-+ };
-+ };
-+
-+ cooling-maps {
-+ map0 {
-+ trip = <&alert2>;
-+ cooling-device =
-+ <&cooling_map0 THERMAL_NO_LIMIT
-+ THERMAL_NO_LIMIT>;
-+ };
-+ };
-+ };
-+
-+ thermal-zone3 {
-+ polling-delay-passive = <1000>;
-+ polling-delay = <5000>;
-+ thermal-sensors = <&tmu 3>;
-+ status = "disabled";
-+
-+ trips {
-+ alert3: alert3 {
-+ temperature = <75000>;
-+ hysteresis = <2000>;
-+ type = "passive";
-+ };
-+
-+ crit3: crit3 {
-+ temperature = <85000>;
-+ hysteresis = <2000>;
-+ type = "critical";
-+ };
-+ };
-+
-+ cooling-maps {
-+ map0 {
-+ trip = <&alert3>;
-+ cooling-device =
-+ <&cooling_map0 THERMAL_NO_LIMIT
-+ THERMAL_NO_LIMIT>;
-+ };
-+ };
-+ };
-+
-+ thermal-zone4 {
-+ polling-delay-passive = <1000>;
-+ polling-delay = <5000>;
-+ thermal-sensors = <&tmu 4>;
-+ status = "disabled";
-+
-+ trips {
-+ alert4: alert4 {
-+ temperature = <75000>;
-+ hysteresis = <2000>;
-+ type = "passive";
-+ };
-+
-+ crit4: crit4 {
-+ temperature = <85000>;
-+ hysteresis = <2000>;
-+ type = "critical";
-+ };
-+ };
-+
-+ cooling-maps {
-+ map0 {
-+ trip = <&alert4>;
-+ cooling-device =
-+ <&cooling_map0 THERMAL_NO_LIMIT
-+ THERMAL_NO_LIMIT>;
-+ };
-+ };
-+ };
-+
-+ thermal-zone5 {
-+ polling-delay-passive = <1000>;
-+ polling-delay = <5000>;
-+ thermal-sensors = <&tmu 5>;
-+ status = "disabled";
-+
-+ trips {
-+ alert5: alert5 {
-+ temperature = <75000>;
-+ hysteresis = <2000>;
-+ type = "passive";
-+ };
-+
-+ crit5: crit5 {
-+ temperature = <85000>;
-+ hysteresis = <2000>;
-+ type = "critical";
-+ };
-+ };
-+
-+ cooling-maps {
-+ map0 {
-+ trip = <&alert5>;
-+ cooling-device =
-+ <&cooling_map0 THERMAL_NO_LIMIT
-+ THERMAL_NO_LIMIT>;
-+ };
-+ };
-+ };
-+
-+ thermal-zone6 {
-+ polling-delay-passive = <1000>;
-+ polling-delay = <5000>;
-+ thermal-sensors = <&tmu 6>;
-+ status = "disabled";
-+
-+ trips {
-+ alert6: alert6 {
-+ temperature = <75000>;
-+ hysteresis = <2000>;
-+ type = "passive";
-+ };
-+
-+ crit6: crit6 {
-+ temperature = <85000>;
-+ hysteresis = <2000>;
-+ type = "critical";
-+ };
-+ };
-+
-+ cooling-maps {
-+ map0 {
-+ trip = <&alert6>;
-+ cooling-device =
-+ <&cooling_map0 THERMAL_NO_LIMIT
-+ THERMAL_NO_LIMIT>;
-+ };
-+ };
-+ };
-+
-+ thermal-zone7 {
-+ polling-delay-passive = <1000>;
-+ polling-delay = <5000>;
-+ thermal-sensors = <&tmu 7>;
-+ status = "disabled";
-+
-+ trips {
-+ alert7: alert7 {
-+ temperature = <75000>;
-+ hysteresis = <2000>;
-+ type = "passive";
-+ };
-+
-+ crit7: crit7 {
-+ temperature = <85000>;
-+ hysteresis = <2000>;
-+ type = "critical";
-+ };
-+ };
-+
-+ cooling-maps {
-+ map0 {
-+ trip = <&alert7>;
-+ cooling-device =
-+ <&cooling_map0 THERMAL_NO_LIMIT
-+ THERMAL_NO_LIMIT>;
-+ };
-+ };
-+ };
-+};
generated by cgit v1.2.3 (git 2.25.1) at 2024-07-26 11:34:32 +0000