diff options
Diffstat (limited to 'target/linux/layerscape/patches-5.4/302-dts-0008-arm64-dts-ls1046a-accumulated-change-to-ls1046a-boar.patch')
| -rw-r--r-- | target/linux/layerscape/patches-5.4/302-dts-0008-arm64-dts-ls1046a-accumulated-change-to-ls1046a-boar.patch | 375 |
1 files changed, 375 insertions, 0 deletions
diff --git a/target/linux/layerscape/patches-5.4/302-dts-0008-arm64-dts-ls1046a-accumulated-change-to-ls1046a-boar.patch b/target/linux/layerscape/patches-5.4/302-dts-0008-arm64-dts-ls1046a-accumulated-change-to-ls1046a-boar.patch new file mode 100644 index 0000000000..ae46d592c7 --- /dev/null +++ b/target/linux/layerscape/patches-5.4/302-dts-0008-arm64-dts-ls1046a-accumulated-change-to-ls1046a-boar.patch @@ -0,0 +1,375 @@ +From 229d32330c7d941b8e04501ad75bc527f6cf1b1c Mon Sep 17 00:00:00 2001 +From: Li Yang <leoyang.li@nxp.com> +Date: Thu, 2 May 2019 16:06:42 -0500 +Subject: [PATCH] arm64: dts: ls1046a: accumulated change to ls1046a boards + +commit 118e2f48ee8da3f5547c24888bd6fdb78f03b7ce +Author: Peng Ma <peng.ma@nxp.com> +Date: Wed Jul 25 08:53:07 2018 +0000 + + dts: fsl-ls1021a, fsl-ls1043a, fsl-ls1046a: add multi block node +support + + add block-offset to support different virtual block offset for qdma + base on soc; + the interrupt named "qdma-queueN(N:0,1,2,3)" correspond to a virtual + block,N based on block number of qdma; + + Signed-off-by: Peng Ma <peng.ma@nxp.com> + +commit 46123df3a174f0d76c8b954a0386e64841453836 +Author: Florinel Iordache <florinel.iordache@nxp.com> +Date: Thu Aug 9 12:29:18 2018 +0300 + + arm64: dts: updates for Unified Backplane driver + + Signed-off-by: Florinel Iordache <florinel.iordache@nxp.com> + +commit c08136017e8b18eb58b153129487c5dc760afd20 +Author: Florinel Iordache <florinel.iordache@nxp.com> +Date: Thu Aug 9 12:23:42 2018 +0300 + + arm64: dts: ls1046: add support for 10GBase-KR + + Signed-off-by: Florinel Iordache <florinel.iordache@nxp.com> + +commit 8473f478783f6f601e1c6d7e6afba49a13f3a6a3 +Author: Zhang Ying-22455 <ying.zhang22455@nxp.com> +Date: Mon Apr 2 16:24:33 2018 +0800 + + arm64: dts: ls1046a: add dts entry for A-010650 + + Signed-off-by: Zhang Ying-22455 <ying.zhang22455@nxp.com> + +commit 3159fe9263fb145601ccb07fcb9336a68fba4e08 +Author: Bao Xiaowei <xiaowei.bao@nxp.com> +Date: Fri Oct 13 11:04:39 2017 +0800 + + arm64: dts: ls1046a: add the property of IB and OB + + Add the property of inbound and outbound windows number for ep + driver. + + Signed-off-by: Bao Xiaowei <xiaowei.bao@nxp.com> + + Acked-by: Minghuan Lian <minghuan.Lian@nxp.com> + Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> + +commit c8fed58f3c9a0219fda0467791f61abd86eb97f3 +Author: Abhimanyu Saini <abhimanyu.saini@nxp.com> +Date: Wed Jan 24 22:56:48 2018 +0530 + + arm64: dts: freescale: ls1046a: Modify DT nodes for qspi + + Signed-off-by: Abhimanyu Saini <abhimanyu.saini@nxp.com> + +commit 96558859ea3a4af44c0b25441f7574ae6222509a +Author: Ran Wang <ran.wang_1@nxp.com> +Date: Fri Jan 5 15:17:23 2018 +0800 + + arm64: dts: ls1046a: Enable usb3-lpm-capable for usb3 node + + Enable USB3 HW LPM feature for ls1046a and active patch for + snps erratum A-010131. It will disable U1/U2 temperary when + initiate U3 request. + + Signed-off-by: Ran Wang <ran.wang_1@nxp.com> + +commit 9b17a5fcf8da5656ff99ebef3d63ba040e9f676d +Author: Zhang Ying-22455 <ying.zhang22455@nxp.com> +Date: Tue Jun 13 13:14:26 2017 +0800 + + arm64: dts: correct the register range of dcfg + + Signed-off-by: Zhang Ying-22455 <ying.zhang22455@nxp.com> + +commit 67c82e3c7b376139d7cee624589bedbc311f8868 +Author: jiaheng.fan <jiaheng.fan@nxp.com> +Date: Thu May 11 17:36:33 2017 +0800 + + arm64: dts: ls1021/ls1043/ls1046: add qdma nodes + + Signed-off-by: jiaheng.fan <jiaheng.fan@nxp.com> + +commit 4a6cef0c83748ee4f6641489fc324bd64095485d +Author: Chenhui Zhao <chenhui.zhao@nxp.com> +Date: Fri May 5 17:53:27 2017 +0800 + + arm64: dts: ls1046a: add ftm0 node + + Signed-off-by: Zhang Ying-22455 <ying.zhang22455@nxp.com> +--- + arch/arm64/boot/dts/freescale/fsl-ls1046a-qds.dts | 148 ++++++++++++++++++++++ + arch/arm64/boot/dts/freescale/fsl-ls1046a-rdb.dts | 1 + + arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi | 28 +++- + 3 files changed, 174 insertions(+), 3 deletions(-) + +--- a/arch/arm64/boot/dts/freescale/fsl-ls1046a-qds.dts ++++ b/arch/arm64/boot/dts/freescale/fsl-ls1046a-qds.dts +@@ -25,6 +25,20 @@ + serial1 = &duart1; + serial2 = &duart2; + serial3 = &duart3; ++ ++ emi1_slot1 = &ls1046mdio_s1; ++ emi1_slot2 = &ls1046mdio_s2; ++ emi1_slot4 = &ls1046mdio_s4; ++ ++ sgmii_s1_p1 = &sgmii_phy_s1_p1; ++ sgmii_s1_p2 = &sgmii_phy_s1_p2; ++ sgmii_s1_p3 = &sgmii_phy_s1_p3; ++ sgmii_s1_p4 = &sgmii_phy_s1_p4; ++ sgmii_s4_p1 = &sgmii_phy_s4_p1; ++ qsgmii_s2_p1 = &qsgmii_phy_s2_p1; ++ qsgmii_s2_p2 = &qsgmii_phy_s2_p2; ++ qsgmii_s2_p3 = &qsgmii_phy_s2_p3; ++ qsgmii_s2_p4 = &qsgmii_phy_s2_p4; + }; + + chosen { +@@ -177,3 +191,137 @@ + }; + + #include "fsl-ls1046-post.dtsi" ++ ++&fman0 { ++ ethernet@e0000 { ++ phy-handle = <&qsgmii_phy_s2_p1>; ++ phy-connection-type = "sgmii"; ++ }; ++ ++ ethernet@e2000 { ++ phy-handle = <&sgmii_phy_s4_p1>; ++ phy-connection-type = "sgmii"; ++ }; ++ ++ ethernet@e4000 { ++ phy-handle = <&rgmii_phy1>; ++ phy-connection-type = "rgmii"; ++ }; ++ ++ ethernet@e6000 { ++ phy-handle = <&rgmii_phy2>; ++ phy-connection-type = "rgmii"; ++ }; ++ ++ ethernet@e8000 { ++ phy-handle = <&sgmii_phy_s1_p3>; ++ phy-connection-type = "sgmii"; ++ }; ++ ++ ethernet@ea000 { ++ phy-handle = <&sgmii_phy_s1_p4>; ++ phy-connection-type = "sgmii"; ++ }; ++ ++ ethernet@f0000 { /* DTSEC9/10GEC1 */ ++ phy-handle = <&sgmii_phy_s1_p1>; ++ phy-connection-type = "xgmii"; ++ }; ++ ++ ethernet@f2000 { /* DTSEC10/10GEC2 */ ++ phy-handle = <&sgmii_phy_s1_p2>; ++ phy-connection-type = "xgmii"; ++ }; ++}; ++ ++&fpga { ++ #address-cells = <1>; ++ #size-cells = <1>; ++ mdio-mux-emi1 { ++ compatible = "mdio-mux-mmioreg", "mdio-mux"; ++ mdio-parent-bus = <&mdio0>; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ reg = <0x54 1>; /* BRDCFG4 */ ++ mux-mask = <0xe0>; /* EMI1 */ ++ ++ /* On-board RGMII1 PHY */ ++ ls1046mdio0: mdio@0 { ++ reg = <0>; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ rgmii_phy1: ethernet-phy@1 { /* MAC3 */ ++ reg = <0x1>; ++ }; ++ }; ++ ++ /* On-board RGMII2 PHY */ ++ ls1046mdio1: mdio@1 { ++ reg = <0x20>; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ rgmii_phy2: ethernet-phy@2 { /* MAC4 */ ++ reg = <0x2>; ++ }; ++ }; ++ ++ /* Slot 1 */ ++ ls1046mdio_s1: mdio@2 { ++ reg = <0x40>; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ status = "disabled"; ++ ++ sgmii_phy_s1_p1: ethernet-phy@1c { ++ reg = <0x1c>; ++ }; ++ ++ sgmii_phy_s1_p2: ethernet-phy@1d { ++ reg = <0x1d>; ++ }; ++ ++ sgmii_phy_s1_p3: ethernet-phy@1e { ++ reg = <0x1e>; ++ }; ++ ++ sgmii_phy_s1_p4: ethernet-phy@1f { ++ reg = <0x1f>; ++ }; ++ }; ++ ++ /* Slot 2 */ ++ ls1046mdio_s2: mdio@3 { ++ reg = <0x60>; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ status = "disabled"; ++ ++ qsgmii_phy_s2_p1: ethernet-phy@8 { ++ reg = <0x8>; ++ }; ++ qsgmii_phy_s2_p2: ethernet-phy@9 { ++ reg = <0x9>; ++ }; ++ qsgmii_phy_s2_p3: ethernet-phy@a { ++ reg = <0xa>; ++ }; ++ qsgmii_phy_s2_p4: ethernet-phy@b { ++ reg = <0xb>; ++ }; ++ }; ++ ++ /* Slot 4 */ ++ ls1046mdio_s4: mdio@5 { ++ reg = <0x80>; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ status = "disabled"; ++ ++ sgmii_phy_s4_p1: ethernet-phy@1c { ++ reg = <0x1c>; ++ }; ++ }; ++ }; ++}; +--- a/arch/arm64/boot/dts/freescale/fsl-ls1046a-rdb.dts ++++ b/arch/arm64/boot/dts/freescale/fsl-ls1046a-rdb.dts +@@ -100,6 +100,7 @@ + + &qspi { + status = "okay"; ++ fsl,qspi-has-second-chip; + + qflash0: flash@0 { + compatible = "spansion,m25p80"; +--- a/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi ++++ b/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi +@@ -304,7 +304,7 @@ + + dcfg: dcfg@1ee0000 { + compatible = "fsl,ls1046a-dcfg", "syscon"; +- reg = <0x0 0x1ee0000 0x0 0x10000>; ++ reg = <0x0 0x1ee0000 0x0 0x1000>; + big-endian; + }; + +@@ -376,7 +376,7 @@ + }; + + i2c0: i2c@2180000 { +- compatible = "fsl,vf610-i2c"; ++ compatible = "fsl,vf610-i2c", "fsl,ls1046a-vf610-i2c"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x0 0x2180000 0x0 0x10000>; +@@ -385,6 +385,7 @@ + dmas = <&edma0 1 39>, + <&edma0 1 38>; + dma-names = "tx", "rx"; ++ scl-gpios = <&gpio3 12 0>; + status = "disabled"; + }; + +@@ -409,12 +410,13 @@ + }; + + i2c3: i2c@21b0000 { +- compatible = "fsl,vf610-i2c"; ++ compatible = "fsl,vf610-i2c", "fsl,ls1046a-vf610-i2c"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x0 0x21b0000 0x0 0x10000>; + interrupts = <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&clockgen 4 1>; ++ scl-gpios = <&gpio3 12 0>; + status = "disabled"; + }; + +@@ -544,6 +546,15 @@ + status = "disabled"; + }; + ++ ftm0: ftm0@29d0000 { ++ compatible = "fsl,ftm-alarm"; ++ reg = <0x0 0x29d0000 0x0 0x10000>, ++ <0x0 0x1ee2140 0x0 0x4>; ++ reg-names = "ftm", "FlexTimer1"; ++ interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>; ++ big-endian; ++ }; ++ + wdog0: watchdog@2ad0000 { + compatible = "fsl,imx21-wdt"; + reg = <0x0 0x2ad0000 0x0 0x10000>; +@@ -576,6 +587,8 @@ + snps,quirk-frame-length-adjustment = <0x20>; + snps,dis_rxdet_inp3_quirk; + snps,incr-burst-type-adjustment = <1>, <4>, <8>, <16>; ++ usb3-lpm-capable; ++ snps,dis-u1u2-when-u3-quirk; + }; + + usb1: usb@3000000 { +@@ -586,6 +599,8 @@ + snps,quirk-frame-length-adjustment = <0x20>; + snps,dis_rxdet_inp3_quirk; + snps,incr-burst-type-adjustment = <1>, <4>, <8>, <16>; ++ usb3-lpm-capable; ++ snps,dis-u1u2-when-u3-quirk; + }; + + usb2: usb@3100000 { +@@ -596,6 +611,8 @@ + snps,quirk-frame-length-adjustment = <0x20>; + snps,dis_rxdet_inp3_quirk; + snps,incr-burst-type-adjustment = <1>, <4>, <8>, <16>; ++ usb3-lpm-capable; ++ snps,dis-u1u2-when-u3-quirk; + }; + + sata: sata@3200000 { +@@ -637,6 +654,11 @@ + <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>; + }; + ++ serdes1: serdes@1ea0000 { ++ reg = <0x0 0x1ea0000 0 0x00002000>; ++ compatible = "fsl,serdes-10g"; ++ }; ++ + pcie@3400000 { + compatible = "fsl,ls1046a-pcie"; + reg = <0x00 0x03400000 0x0 0x00100000 /* controller registers */ |