diff options
Diffstat (limited to 'target/linux/layerscape/patches-4.9/401-mtd-spi-nor-support-layerscape.patch')
| -rw-r--r-- | target/linux/layerscape/patches-4.9/401-mtd-spi-nor-support-layerscape.patch | 22 |
1 files changed, 11 insertions, 11 deletions
diff --git a/target/linux/layerscape/patches-4.9/401-mtd-spi-nor-support-layerscape.patch b/target/linux/layerscape/patches-4.9/401-mtd-spi-nor-support-layerscape.patch index 4c07f2f283..89139d93b8 100644 --- a/target/linux/layerscape/patches-4.9/401-mtd-spi-nor-support-layerscape.patch +++ b/target/linux/layerscape/patches-4.9/401-mtd-spi-nor-support-layerscape.patch @@ -715,7 +715,7 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com> /* Everspin */ { "mr25h256", CAT25_INFO( 32 * 1024, 1, 256, 2, SPI_NOR_NO_ERASE | SPI_NOR_NO_FR) }, -@@ -1015,12 +1029,15 @@ static const struct flash_info spi_nor_i +@@ -1021,12 +1035,15 @@ static const struct flash_info spi_nor_i { "mx25l3205d", INFO(0xc22016, 0, 64 * 1024, 64, SECT_4K) }, { "mx25l3255e", INFO(0xc29e16, 0, 64 * 1024, 64, SECT_4K) }, { "mx25l6405d", INFO(0xc22017, 0, 64 * 1024, 128, SECT_4K) }, @@ -732,7 +732,7 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com> { "mx25l25655e", INFO(0xc22619, 0, 64 * 1024, 512, 0) }, { "mx66l51235l", INFO(0xc2201a, 0, 64 * 1024, 1024, SPI_NOR_QUAD_READ) }, { "mx66l1g55g", INFO(0xc2261b, 0, 64 * 1024, 2048, SPI_NOR_QUAD_READ) }, -@@ -1034,10 +1051,11 @@ static const struct flash_info spi_nor_i +@@ -1040,10 +1057,11 @@ static const struct flash_info spi_nor_i { "n25q128a11", INFO(0x20bb18, 0, 64 * 1024, 256, SECT_4K | SPI_NOR_QUAD_READ) }, { "n25q128a13", INFO(0x20ba18, 0, 64 * 1024, 256, SECT_4K | SPI_NOR_QUAD_READ) }, { "n25q256a", INFO(0x20ba19, 0, 64 * 1024, 512, SECT_4K | SPI_NOR_QUAD_READ) }, @@ -746,7 +746,7 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com> /* PMC */ { "pm25lv512", INFO(0, 0, 32 * 1024, 2, SECT_4K_PMC) }, -@@ -1055,8 +1073,11 @@ static const struct flash_info spi_nor_i +@@ -1061,8 +1079,11 @@ static const struct flash_info spi_nor_i { "s70fl01gs", INFO(0x010221, 0x4d00, 256 * 1024, 256, 0) }, { "s25sl12800", INFO(0x012018, 0x0300, 256 * 1024, 64, 0) }, { "s25sl12801", INFO(0x012018, 0x0301, 64 * 1024, 256, 0) }, @@ -759,7 +759,7 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com> { "s25fl129p1", INFO(0x012018, 0x4d01, 64 * 1024, 256, SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) }, { "s25sl004a", INFO(0x010212, 0, 64 * 1024, 8, 0) }, { "s25sl008a", INFO(0x010213, 0, 64 * 1024, 16, 0) }, -@@ -1130,7 +1151,15 @@ static const struct flash_info spi_nor_i +@@ -1136,7 +1157,15 @@ static const struct flash_info spi_nor_i { "w25x40", INFO(0xef3013, 0, 64 * 1024, 8, SECT_4K) }, { "w25x80", INFO(0xef3014, 0, 64 * 1024, 16, SECT_4K) }, { "w25x16", INFO(0xef3015, 0, 64 * 1024, 32, SECT_4K) }, @@ -775,7 +775,7 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com> { "w25q32", INFO(0xef4016, 0, 64 * 1024, 64, SECT_4K) }, { "w25q32dw", INFO(0xef6016, 0, 64 * 1024, 64, -@@ -1202,6 +1231,53 @@ static const struct flash_info *spi_nor_ +@@ -1208,6 +1237,53 @@ static const struct flash_info *spi_nor_ id[0], id[1], id[2]); return ERR_PTR(-ENODEV); } @@ -829,7 +829,7 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com> static int spi_nor_read(struct mtd_info *mtd, loff_t from, size_t len, size_t *retlen, u_char *buf) -@@ -1421,7 +1497,7 @@ static int macronix_quad_enable(struct s +@@ -1427,7 +1503,7 @@ static int macronix_quad_enable(struct s * Write status Register and configuration register with 2 bytes * The first byte will be written to the status register, while the * second byte will be written to the configuration register. @@ -838,7 +838,7 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com> */ static int write_sr_cr(struct spi_nor *nor, u16 val) { -@@ -1469,6 +1545,24 @@ static int spansion_quad_enable(struct s +@@ -1475,6 +1551,24 @@ static int spansion_quad_enable(struct s return 0; } @@ -863,7 +863,7 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com> static int set_quad_mode(struct spi_nor *nor, const struct flash_info *info) { int status; -@@ -1615,9 +1709,25 @@ int spi_nor_scan(struct spi_nor *nor, co +@@ -1621,9 +1715,25 @@ int spi_nor_scan(struct spi_nor *nor, co write_sr(nor, 0); spi_nor_wait_till_ready(nor); } @@ -889,7 +889,7 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com> mtd->priv = nor; mtd->type = MTD_NORFLASH; mtd->writesize = 1; -@@ -1651,6 +1761,8 @@ int spi_nor_scan(struct spi_nor *nor, co +@@ -1657,6 +1767,8 @@ int spi_nor_scan(struct spi_nor *nor, co nor->flags |= SNOR_F_USE_FSR; if (info->flags & SPI_NOR_HAS_TB) nor->flags |= SNOR_F_HAS_SR_TB; @@ -898,7 +898,7 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com> #ifdef CONFIG_MTD_SPI_NOR_USE_4K_SECTORS /* prefer "small sector" erase if possible */ -@@ -1690,9 +1802,15 @@ int spi_nor_scan(struct spi_nor *nor, co +@@ -1696,9 +1808,15 @@ int spi_nor_scan(struct spi_nor *nor, co /* Some devices cannot do fast-read, no matter what DT tells us */ if (info->flags & SPI_NOR_NO_FR) nor->flash_read = SPI_NOR_NORMAL; @@ -917,7 +917,7 @@ Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com> ret = set_quad_mode(nor, info); if (ret) { dev_err(dev, "quad mode not supported\n"); -@@ -1705,6 +1823,9 @@ int spi_nor_scan(struct spi_nor *nor, co +@@ -1711,6 +1829,9 @@ int spi_nor_scan(struct spi_nor *nor, co /* Default commands */ switch (nor->flash_read) { |