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-rw-r--r--target/linux/layerscape/patches-4.4/0052-PCI-designware-Simplify-control-flow.patch121
1 files changed, 121 insertions, 0 deletions
diff --git a/target/linux/layerscape/patches-4.4/0052-PCI-designware-Simplify-control-flow.patch b/target/linux/layerscape/patches-4.4/0052-PCI-designware-Simplify-control-flow.patch
new file mode 100644
index 0000000000..1eef2b61f3
--- /dev/null
+++ b/target/linux/layerscape/patches-4.4/0052-PCI-designware-Simplify-control-flow.patch
@@ -0,0 +1,121 @@
+From 610b32220391c9d271290bdf8f2b8fe1cf8da9a0 Mon Sep 17 00:00:00 2001
+From: Bjorn Helgaas <bhelgaas@google.com>
+Date: Tue, 5 Jan 2016 15:48:11 -0600
+Subject: [PATCH 52/70] PCI: designware: Simplify control flow
+
+Return values immediately when possible to simplify the control flow.
+
+No functional change intended. Folded in unused variable removal as
+pointed out by Fabio Estevam <fabio.estevam@nxp.com>, Arnd Bergmann
+<arnd@arndb.de>, and Thierry Reding <thierry.reding@gmail.com>.
+
+Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
+Acked-by: Pratyush Anand <pratyush.anand@gmail.com>
+---
+ drivers/pci/host/pcie-designware.c | 54 ++++++++++++------------------------
+ 1 file changed, 18 insertions(+), 36 deletions(-)
+
+--- a/drivers/pci/host/pcie-designware.c
++++ b/drivers/pci/host/pcie-designware.c
+@@ -128,27 +128,19 @@ static inline void dw_pcie_writel_rc(str
+ static int dw_pcie_rd_own_conf(struct pcie_port *pp, int where, int size,
+ u32 *val)
+ {
+- int ret;
+-
+ if (pp->ops->rd_own_conf)
+- ret = pp->ops->rd_own_conf(pp, where, size, val);
+- else
+- ret = dw_pcie_cfg_read(pp->dbi_base + where, size, val);
++ return pp->ops->rd_own_conf(pp, where, size, val);
+
+- return ret;
++ return dw_pcie_cfg_read(pp->dbi_base + where, size, val);
+ }
+
+ static int dw_pcie_wr_own_conf(struct pcie_port *pp, int where, int size,
+ u32 val)
+ {
+- int ret;
+-
+ if (pp->ops->wr_own_conf)
+- ret = pp->ops->wr_own_conf(pp, where, size, val);
+- else
+- ret = dw_pcie_cfg_write(pp->dbi_base + where, size, val);
++ return pp->ops->wr_own_conf(pp, where, size, val);
+
+- return ret;
++ return dw_pcie_cfg_write(pp->dbi_base + where, size, val);
+ }
+
+ static void dw_pcie_prog_outbound_atu(struct pcie_port *pp, int index,
+@@ -392,8 +384,8 @@ int dw_pcie_link_up(struct pcie_port *pp
+ {
+ if (pp->ops->link_up)
+ return pp->ops->link_up(pp);
+- else
+- return 0;
++
++ return 0;
+ }
+
+ static int dw_pcie_msi_map(struct irq_domain *domain, unsigned int irq,
+@@ -666,46 +658,36 @@ static int dw_pcie_rd_conf(struct pci_bu
+ int size, u32 *val)
+ {
+ struct pcie_port *pp = bus->sysdata;
+- int ret;
+
+ if (dw_pcie_valid_config(pp, bus, PCI_SLOT(devfn)) == 0) {
+ *val = 0xffffffff;
+ return PCIBIOS_DEVICE_NOT_FOUND;
+ }
+
+- if (bus->number != pp->root_bus_nr)
+- if (pp->ops->rd_other_conf)
+- ret = pp->ops->rd_other_conf(pp, bus, devfn,
+- where, size, val);
+- else
+- ret = dw_pcie_rd_other_conf(pp, bus, devfn,
+- where, size, val);
+- else
+- ret = dw_pcie_rd_own_conf(pp, where, size, val);
++ if (bus->number == pp->root_bus_nr)
++ return dw_pcie_rd_own_conf(pp, where, size, val);
+
+- return ret;
++ if (pp->ops->rd_other_conf)
++ return pp->ops->rd_other_conf(pp, bus, devfn, where, size, val);
++
++ return dw_pcie_rd_other_conf(pp, bus, devfn, where, size, val);
+ }
+
+ static int dw_pcie_wr_conf(struct pci_bus *bus, u32 devfn,
+ int where, int size, u32 val)
+ {
+ struct pcie_port *pp = bus->sysdata;
+- int ret;
+
+ if (dw_pcie_valid_config(pp, bus, PCI_SLOT(devfn)) == 0)
+ return PCIBIOS_DEVICE_NOT_FOUND;
+
+- if (bus->number != pp->root_bus_nr)
+- if (pp->ops->wr_other_conf)
+- ret = pp->ops->wr_other_conf(pp, bus, devfn,
+- where, size, val);
+- else
+- ret = dw_pcie_wr_other_conf(pp, bus, devfn,
+- where, size, val);
+- else
+- ret = dw_pcie_wr_own_conf(pp, where, size, val);
++ if (bus->number == pp->root_bus_nr)
++ return dw_pcie_wr_own_conf(pp, where, size, val);
+
+- return ret;
++ if (pp->ops->wr_other_conf)
++ return pp->ops->wr_other_conf(pp, bus, devfn, where, size, val);
++
++ return dw_pcie_wr_other_conf(pp, bus, devfn, where, size, val);
+ }
+
+ static struct pci_ops dw_pcie_ops = {