diff options
Diffstat (limited to 'target/linux/layerscape/patches-4.14/701-dpaa2-dpio-support-layerscape.patch')
| -rw-r--r-- | target/linux/layerscape/patches-4.14/701-dpaa2-dpio-support-layerscape.patch | 2992 |
1 files changed, 0 insertions, 2992 deletions
diff --git a/target/linux/layerscape/patches-4.14/701-dpaa2-dpio-support-layerscape.patch b/target/linux/layerscape/patches-4.14/701-dpaa2-dpio-support-layerscape.patch deleted file mode 100644 index ce5dfdbe86..0000000000 --- a/target/linux/layerscape/patches-4.14/701-dpaa2-dpio-support-layerscape.patch +++ /dev/null @@ -1,2992 +0,0 @@ -From 80df9e62536d7cac5c03a4fcb494c6ddf0723633 Mon Sep 17 00:00:00 2001 -From: Biwen Li <biwen.li@nxp.com> -Date: Wed, 17 Apr 2019 18:58:27 +0800 -Subject: [PATCH] dpaa2-dpio: support layerscape -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -This is an integrated patch of dpaa2-dpio for layerscape - -Signed-off-by: Bharat Bhushan <Bharat.Bhushan@nxp.com> -Signed-off-by: Biwen Li <biwen.li@nxp.com> -Signed-off-by: Bogdan Purcareata <bogdan.purcareata@nxp.com> -Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> -Signed-off-by: Guanhua Gao <guanhua.gao@nxp.com> -Signed-off-by: Haiying Wang <Haiying.Wang@nxp.com> -Signed-off-by: Horia Geantă <horia.geanta@nxp.com> -Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com> -Signed-off-by: Ioana Radulescu <ruxandra.radulescu@nxp.com> -Signed-off-by: Laurentiu Tudor <laurentiu.tudor@nxp.com> -Signed-off-by: Li Yang <leoyang.li@nxp.com> -Signed-off-by: Radu Alexe <radu.alexe@nxp.com> -Signed-off-by: Roy Pledge <roy.pledge@nxp.com> -Signed-off-by: Youri Querry <youri.querry_1@nxp.com> ---- - drivers/staging/fsl-mc/Kconfig | 1 + - drivers/staging/fsl-mc/Makefile | 1 + - drivers/staging/fsl-mc/bus/Kconfig | 5 +- - drivers/staging/fsl-mc/bus/Makefile | 3 +- - drivers/staging/fsl-mc/bus/dpbp-cmd.h | 28 +- - drivers/staging/fsl-mc/bus/dpbp.c | 28 +- - drivers/staging/fsl-mc/bus/dpcon-cmd.h | 28 +- - drivers/staging/fsl-mc/bus/dpcon.c | 32 +- - drivers/staging/fsl-mc/bus/dpio/Makefile | 3 +- - drivers/staging/fsl-mc/bus/dpio/dpio-cmd.h | 29 +- - drivers/staging/fsl-mc/bus/dpio/dpio-driver.c | 99 ++-- - .../staging/fsl-mc/bus/dpio/dpio-service.c | 295 +++++++++--- - drivers/staging/fsl-mc/bus/dpio/dpio.c | 51 +-- - drivers/staging/fsl-mc/bus/dpio/dpio.h | 32 +- - .../staging/fsl-mc/bus/dpio/qbman-portal.c | 421 ++++++++++++++---- - .../staging/fsl-mc/bus/dpio/qbman-portal.h | 134 ++++-- - drivers/staging/fsl-mc/bus/dpmcp.c | 28 +- - drivers/staging/fsl-mc/bus/dprc-driver.c | 4 +- - drivers/staging/fsl-mc/bus/dprc.c | 28 +- - drivers/staging/fsl-mc/bus/fsl-mc-allocator.c | 4 +- - drivers/staging/fsl-mc/bus/fsl-mc-bus.c | 4 +- - drivers/staging/fsl-mc/bus/fsl-mc-msi.c | 4 +- - drivers/staging/fsl-mc/bus/fsl-mc-private.h | 4 +- - .../fsl-mc/bus/irq-gic-v3-its-fsl-mc-msi.c | 4 +- - drivers/staging/fsl-mc/bus/mc-io.c | 28 +- - drivers/staging/fsl-mc/bus/mc-sys.c | 28 +- - drivers/staging/fsl-mc/include/dpaa2-fd.h | 288 ++++++++++-- - drivers/staging/fsl-mc/include/dpaa2-global.h | 27 +- - drivers/staging/fsl-mc/include/dpaa2-io.h | 110 +++-- - drivers/staging/fsl-mc/include/dpbp.h | 29 +- - drivers/staging/fsl-mc/include/dpcon.h | 32 +- - drivers/staging/fsl-mc/include/dpopr.h | 110 +++++ - drivers/staging/fsl-mc/include/mc.h | 4 +- - 33 files changed, 1233 insertions(+), 693 deletions(-) - create mode 100644 drivers/staging/fsl-mc/include/dpopr.h - ---- a/drivers/staging/fsl-mc/Kconfig -+++ b/drivers/staging/fsl-mc/Kconfig -@@ -1 +1,2 @@ -+# SPDX-License-Identifier: GPL-2.0 - source "drivers/staging/fsl-mc/bus/Kconfig" ---- a/drivers/staging/fsl-mc/Makefile -+++ b/drivers/staging/fsl-mc/Makefile -@@ -1,2 +1,3 @@ -+# SPDX-License-Identifier: GPL-2.0 - # Freescale Management Complex (MC) bus drivers - obj-$(CONFIG_FSL_MC_BUS) += bus/ ---- a/drivers/staging/fsl-mc/bus/Kconfig -+++ b/drivers/staging/fsl-mc/bus/Kconfig -@@ -1,10 +1,9 @@ -+# SPDX-License-Identifier: GPL-2.0 - # - # DPAA2 fsl-mc bus - # - # Copyright (C) 2014-2016 Freescale Semiconductor, Inc. - # --# This file is released under the GPLv2 --# - - config FSL_MC_BUS - bool "QorIQ DPAA2 fsl-mc bus driver" -@@ -18,7 +17,7 @@ config FSL_MC_BUS - - config FSL_MC_DPIO - tristate "QorIQ DPAA2 DPIO driver" -- depends on FSL_MC_BUS && ARCH_LAYERSCAPE -+ depends on FSL_MC_BUS - help - Driver for the DPAA2 DPIO object. A DPIO provides queue and - buffer management facilities for software to interact with ---- a/drivers/staging/fsl-mc/bus/Makefile -+++ b/drivers/staging/fsl-mc/bus/Makefile -@@ -1,10 +1,9 @@ -+# SPDX-License-Identifier: GPL-2.0 - # - # Freescale Management Complex (MC) bus drivers - # - # Copyright (C) 2014 Freescale Semiconductor, Inc. - # --# This file is released under the GPLv2 --# - obj-$(CONFIG_FSL_MC_BUS) += mc-bus-driver.o - - mc-bus-driver-objs := fsl-mc-bus.o \ ---- a/drivers/staging/fsl-mc/bus/dpbp-cmd.h -+++ b/drivers/staging/fsl-mc/bus/dpbp-cmd.h -@@ -1,33 +1,7 @@ -+/* SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) */ - /* - * Copyright 2013-2016 Freescale Semiconductor Inc. - * -- * Redistribution and use in source and binary forms, with or without -- * modification, are permitted provided that the following conditions are met: -- * * Redistributions of source code must retain the above copyright -- * notice, this list of conditions and the following disclaimer. -- * * Redistributions in binary form must reproduce the above copyright -- * notice, this list of conditions and the following disclaimer in the -- * documentation and/or other materials provided with the distribution. -- * * Neither the name of the above-listed copyright holders nor the -- * names of any contributors may be used to endorse or promote products -- * derived from this software without specific prior written permission. -- * -- * ALTERNATIVELY, this software may be distributed under the terms of the -- * GNU General Public License ("GPL") as published by the Free Software -- * Foundation, either version 2 of that License or (at your option) any -- * later version. -- * -- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" -- * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE -- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE -- * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE -- * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR -- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF -- * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS -- * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN -- * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) -- * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE -- * POSSIBILITY OF SUCH DAMAGE. - */ - #ifndef _FSL_DPBP_CMD_H - #define _FSL_DPBP_CMD_H ---- a/drivers/staging/fsl-mc/bus/dpbp.c -+++ b/drivers/staging/fsl-mc/bus/dpbp.c -@@ -1,33 +1,7 @@ -+// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) - /* - * Copyright 2013-2016 Freescale Semiconductor Inc. - * -- * Redistribution and use in source and binary forms, with or without -- * modification, are permitted provided that the following conditions are met: -- * * Redistributions of source code must retain the above copyright -- * notice, this list of conditions and the following disclaimer. -- * * Redistributions in binary form must reproduce the above copyright -- * notice, this list of conditions and the following disclaimer in the -- * documentation and/or other materials provided with the distribution. -- * * Neither the name of the above-listed copyright holders nor the -- * names of any contributors may be used to endorse or promote products -- * derived from this software without specific prior written permission. -- * -- * ALTERNATIVELY, this software may be distributed under the terms of the -- * GNU General Public License ("GPL") as published by the Free Software -- * Foundation, either version 2 of that License or (at your option) any -- * later version. -- * -- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" -- * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE -- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE -- * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE -- * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR -- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF -- * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS -- * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN -- * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) -- * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE -- * POSSIBILITY OF SUCH DAMAGE. - */ - #include <linux/kernel.h> - #include "../include/mc.h" ---- a/drivers/staging/fsl-mc/bus/dpcon-cmd.h -+++ b/drivers/staging/fsl-mc/bus/dpcon-cmd.h -@@ -1,33 +1,7 @@ -+/* SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) */ - /* - * Copyright 2013-2016 Freescale Semiconductor Inc. - * -- * Redistribution and use in source and binary forms, with or without -- * modification, are permitted provided that the following conditions are met: -- * * Redistributions of source code must retain the above copyright -- * notice, this list of conditions and the following disclaimer. -- * * Redistributions in binary form must reproduce the above copyright -- * notice, this list of conditions and the following disclaimer in the -- * documentation and/or other materials provided with the distribution. -- * * Neither the name of the above-listed copyright holders nor the -- * names of any contributors may be used to endorse or promote products -- * derived from this software without specific prior written permission. -- * -- * ALTERNATIVELY, this software may be distributed under the terms of the -- * GNU General Public License ("GPL") as published by the Free Software -- * Foundation, either version 2 of that License or (at your option) any -- * later version. -- * -- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" -- * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE -- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE -- * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE -- * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR -- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF -- * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS -- * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN -- * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) -- * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE -- * POSSIBILITY OF SUCH DAMAGE. - */ - #ifndef _FSL_DPCON_CMD_H - #define _FSL_DPCON_CMD_H ---- a/drivers/staging/fsl-mc/bus/dpcon.c -+++ b/drivers/staging/fsl-mc/bus/dpcon.c -@@ -1,33 +1,7 @@ --/* Copyright 2013-2016 Freescale Semiconductor Inc. -+// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) -+/* -+ * Copyright 2013-2016 Freescale Semiconductor Inc. - * -- * Redistribution and use in source and binary forms, with or without -- * modification, are permitted provided that the following conditions are met: -- * * Redistributions of source code must retain the above copyright -- * notice, this list of conditions and the following disclaimer. -- * * Redistributions in binary form must reproduce the above copyright -- * notice, this list of conditions and the following disclaimer in the -- * documentation and/or other materials provided with the distribution. -- * * Neither the name of the above-listed copyright holders nor the -- * names of any contributors may be used to endorse or promote products -- * derived from this software without specific prior written permission. -- * -- * -- * ALTERNATIVELY, this software may be distributed under the terms of the -- * GNU General Public License ("GPL") as published by the Free Software -- * Foundation, either version 2 of that License or (at your option) any -- * later version. -- * -- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" -- * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE -- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE -- * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE -- * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR -- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF -- * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS -- * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN -- * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) -- * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE -- * POSSIBILITY OF SUCH DAMAGE. - */ - #include <linux/kernel.h> - #include "../include/mc.h" ---- a/drivers/staging/fsl-mc/bus/dpio/Makefile -+++ b/drivers/staging/fsl-mc/bus/dpio/Makefile -@@ -1,9 +1,8 @@ -+# SPDX-License-Identifier: GPL-2.0 - # - # QorIQ DPAA2 DPIO driver - # - --subdir-ccflags-y := -Werror -- - obj-$(CONFIG_FSL_MC_DPIO) += fsl-mc-dpio.o - - fsl-mc-dpio-objs := dpio.o qbman-portal.o dpio-service.o dpio-driver.o ---- a/drivers/staging/fsl-mc/bus/dpio/dpio-cmd.h -+++ b/drivers/staging/fsl-mc/bus/dpio/dpio-cmd.h -@@ -1,34 +1,8 @@ -+/* SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) */ - /* - * Copyright 2013-2016 Freescale Semiconductor Inc. - * Copyright 2016 NXP - * -- * Redistribution and use in source and binary forms, with or without -- * modification, are permitted provided that the following conditions are met: -- * * Redistributions of source code must retain the above copyright -- * notice, this list of conditions and the following disclaimer. -- * * Redistributions in binary form must reproduce the above copyright -- * notice, this list of conditions and the following disclaimer in the -- * documentation and/or other materials provided with the distribution. -- * * Neither the name of the above-listed copyright holders nor the -- * names of any contributors may be used to endorse or promote products -- * derived from this software without specific prior written permission. -- * -- * ALTERNATIVELY, this software may be distributed under the terms of the -- * GNU General Public License ("GPL") as published by the Free Software -- * Foundation, either version 2 of that License or (at your option) any -- * later version. -- * -- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" -- * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE -- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE -- * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE -- * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR -- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF -- * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS -- * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN -- * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) -- * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE -- * POSSIBILITY OF SUCH DAMAGE. - */ - #ifndef _FSL_DPIO_CMD_H - #define _FSL_DPIO_CMD_H -@@ -51,6 +25,7 @@ - #define DPIO_CMDID_ENABLE DPIO_CMD(0x002) - #define DPIO_CMDID_DISABLE DPIO_CMD(0x003) - #define DPIO_CMDID_GET_ATTR DPIO_CMD(0x004) -+#define DPIO_CMDID_RESET DPIO_CMD(0x005) - - struct dpio_cmd_open { - __le32 dpio_id; ---- a/drivers/staging/fsl-mc/bus/dpio/dpio-driver.c -+++ b/drivers/staging/fsl-mc/bus/dpio/dpio-driver.c -@@ -1,33 +1,8 @@ -+// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) - /* - * Copyright 2014-2016 Freescale Semiconductor Inc. -- * Copyright NXP 2016 -+ * Copyright 2016 NXP - * -- * Redistribution and use in source and binary forms, with or without -- * modification, are permitted provided that the following conditions are met: -- * * Redistributions of source code must retain the above copyright -- * notice, this list of conditions and the following disclaimer. -- * * Redistributions in binary form must reproduce the above copyright -- * notice, this list of conditions and the following disclaimer in the -- * documentation and/or other materials provided with the distribution. -- * * Neither the name of Freescale Semiconductor nor the -- * names of its contributors may be used to endorse or promote products -- * derived from this software without specific prior written permission. -- * -- * ALTERNATIVELY, this software may be distributed under the terms of the -- * GNU General Public License ("GPL") as published by the Free Software -- * Foundation, either version 2 of that License or (at your option) any -- * later version. -- * -- * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY -- * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED -- * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE -- * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY -- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES -- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; -- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND -- * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS -- * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - - #include <linux/types.h> -@@ -38,6 +13,7 @@ - #include <linux/msi.h> - #include <linux/dma-mapping.h> - #include <linux/delay.h> -+#include <linux/io.h> - - #include "../../include/mc.h" - #include "../../include/dpaa2-io.h" -@@ -54,6 +30,8 @@ struct dpio_priv { - struct dpaa2_io *io; - }; - -+static cpumask_var_t cpus_unused_mask; -+ - static irqreturn_t dpio_irq_handler(int irq_num, void *arg) - { - struct device *dev = (struct device *)arg; -@@ -113,7 +91,7 @@ static int dpaa2_dpio_probe(struct fsl_m - struct dpio_priv *priv; - int err = -ENOMEM; - struct device *dev = &dpio_dev->dev; -- static int next_cpu = -1; -+ int possible_next_cpu; - - priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL); - if (!priv) -@@ -135,6 +113,12 @@ static int dpaa2_dpio_probe(struct fsl_m - goto err_open; - } - -+ err = dpio_reset(dpio_dev->mc_io, 0, dpio_dev->mc_handle); -+ if (err) { -+ dev_err(dev, "dpio_reset() failed\n"); -+ goto err_reset; -+ } -+ - err = dpio_get_attributes(dpio_dev->mc_io, 0, dpio_dev->mc_handle, - &dpio_attrs); - if (err) { -@@ -155,26 +139,35 @@ static int dpaa2_dpio_probe(struct fsl_m - desc.dpio_id = dpio_dev->obj_desc.id; - - /* get the cpu to use for the affinity hint */ -- if (next_cpu == -1) -- next_cpu = cpumask_first(cpu_online_mask); -- else -- next_cpu = cpumask_next(next_cpu, cpu_online_mask); -- -- if (!cpu_possible(next_cpu)) { -+ possible_next_cpu = cpumask_first(cpus_unused_mask); -+ if (possible_next_cpu >= nr_cpu_ids) { - dev_err(dev, "probe failed. Number of DPIOs exceeds NR_CPUS.\n"); - err = -ERANGE; - goto err_allocate_irqs; - } -- desc.cpu = next_cpu; -+ desc.cpu = possible_next_cpu; -+ cpumask_clear_cpu(possible_next_cpu, cpus_unused_mask); - -- /* -- * Set the CENA regs to be the cache inhibited area of the portal to -- * avoid coherency issues if a user migrates to another core. -- */ -- desc.regs_cena = ioremap_wc(dpio_dev->regions[1].start, -- resource_size(&dpio_dev->regions[1])); -- desc.regs_cinh = ioremap(dpio_dev->regions[1].start, -- resource_size(&dpio_dev->regions[1])); -+ if (dpio_dev->obj_desc.region_count < 3) { -+ /* No support for DDR backed portals, use classic mapping */ -+ desc.regs_cena = ioremap_cache_ns(dpio_dev->regions[0].start, -+ resource_size(&dpio_dev->regions[0])); -+ } else { -+ desc.regs_cena = memremap(dpio_dev->regions[2].start, -+ resource_size(&dpio_dev->regions[2]), -+ MEMREMAP_WB); -+ } -+ if (IS_ERR(desc.regs_cena)) { -+ dev_err(dev, "ioremap_cache_ns failed\n"); -+ goto err_allocate_irqs; -+ } -+ -+ desc.regs_cinh = devm_ioremap(dev, dpio_dev->regions[1].start, -+ resource_size(&dpio_dev->regions[1])); -+ if (!desc.regs_cinh) { -+ dev_err(dev, "devm_ioremap failed\n"); -+ goto err_allocate_irqs; -+ } - - err = fsl_mc_allocate_irqs(dpio_dev); - if (err) { -@@ -186,7 +179,7 @@ static int dpaa2_dpio_probe(struct fsl_m - if (err) - goto err_register_dpio_irq; - -- priv->io = dpaa2_io_create(&desc); -+ priv->io = dpaa2_io_create(&desc, dev); - if (!priv->io) { - dev_err(dev, "dpaa2_io_create failed\n"); - goto err_dpaa2_io_create; -@@ -196,7 +189,6 @@ static int dpaa2_dpio_probe(struct fsl_m - dev_dbg(dev, " receives_notifications = %d\n", - desc.receives_notifications); - dpio_close(dpio_dev->mc_io, 0, dpio_dev->mc_handle); -- fsl_mc_portal_free(dpio_dev->mc_io); - - return 0; - -@@ -207,6 +199,7 @@ err_register_dpio_irq: - err_allocate_irqs: - dpio_disable(dpio_dev->mc_io, 0, dpio_dev->mc_handle); - err_get_attr: -+err_reset: - dpio_close(dpio_dev->mc_io, 0, dpio_dev->mc_handle); - err_open: - fsl_mc_portal_free(dpio_dev->mc_io); -@@ -227,7 +220,7 @@ static int dpaa2_dpio_remove(struct fsl_ - { - struct device *dev; - struct dpio_priv *priv; -- int err; -+ int err = 0, cpu; - - dev = &dpio_dev->dev; - priv = dev_get_drvdata(dev); -@@ -236,11 +229,8 @@ static int dpaa2_dpio_remove(struct fsl_ - - dpio_teardown_irqs(dpio_dev); - -- err = fsl_mc_portal_allocate(dpio_dev, 0, &dpio_dev->mc_io); -- if (err) { -- dev_err(dev, "MC portal allocation failed\n"); -- goto err_mcportal; -- } -+ cpu = dpaa2_io_get_cpu(priv->io); -+ cpumask_set_cpu(cpu, cpus_unused_mask); - - err = dpio_open(dpio_dev->mc_io, 0, dpio_dev->obj_desc.id, - &dpio_dev->mc_handle); -@@ -261,7 +251,7 @@ static int dpaa2_dpio_remove(struct fsl_ - - err_open: - fsl_mc_portal_free(dpio_dev->mc_io); --err_mcportal: -+ - return err; - } - -@@ -285,11 +275,16 @@ static struct fsl_mc_driver dpaa2_dpio_d - - static int dpio_driver_init(void) - { -+ if (!zalloc_cpumask_var(&cpus_unused_mask, GFP_KERNEL)) -+ return -ENOMEM; -+ cpumask_copy(cpus_unused_mask, cpu_online_mask); -+ - return fsl_mc_driver_register(&dpaa2_dpio_driver); - } - - static void dpio_driver_exit(void) - { -+ free_cpumask_var(cpus_unused_mask); - fsl_mc_driver_unregister(&dpaa2_dpio_driver); - } - module_init(dpio_driver_init); ---- a/drivers/staging/fsl-mc/bus/dpio/dpio-service.c -+++ b/drivers/staging/fsl-mc/bus/dpio/dpio-service.c -@@ -1,33 +1,8 @@ -+// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) - /* - * Copyright 2014-2016 Freescale Semiconductor Inc. - * Copyright 2016 NXP - * -- * Redistribution and use in source and binary forms, with or without -- * modification, are permitted provided that the following conditions are met: -- * * Redistributions of source code must retain the above copyright -- * notice, this list of conditions and the following disclaimer. -- * * Redistributions in binary form must reproduce the above copyright -- * notice, this list of conditions and the following disclaimer in the -- * documentation and/or other materials provided with the distribution. -- * * Neither the name of Freescale Semiconductor nor the -- * names of its contributors may be used to endorse or promote products -- * derived from this software without specific prior written permission. -- * -- * ALTERNATIVELY, this software may be distributed under the terms of the -- * GNU General Public License ("GPL") as published by the Free Software -- * Foundation, either version 2 of that License or (at your option) any -- * later version. -- * -- * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY -- * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED -- * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE -- * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY -- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES -- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; -- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND -- * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS -- * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - #include <linux/types.h> - #include "../../include/mc.h" -@@ -43,7 +18,6 @@ - #include "qbman-portal.h" - - struct dpaa2_io { -- atomic_t refs; - struct dpaa2_io_desc dpio_desc; - struct qbman_swp_desc swp_desc; - struct qbman_swp *swp; -@@ -53,6 +27,7 @@ struct dpaa2_io { - /* protect notifications list */ - spinlock_t lock_notifications; - struct list_head notifications; -+ struct device *dev; - }; - - struct dpaa2_io_store { -@@ -83,7 +58,7 @@ static inline struct dpaa2_io *service_s - * If cpu == -1, choose the current cpu, with no guarantees about - * potentially being migrated away. - */ -- if (unlikely(cpu < 0)) -+ if (cpu < 0) - cpu = smp_processor_id(); - - /* If a specific cpu was requested, pick it up immediately */ -@@ -95,6 +70,10 @@ static inline struct dpaa2_io *service_s - if (d) - return d; - -+ d = service_select_by_cpu(d, -1); -+ if (d) -+ return d; -+ - spin_lock(&dpio_list_lock); - d = list_entry(dpio_list.next, struct dpaa2_io, node); - list_del(&d->node); -@@ -105,15 +84,34 @@ static inline struct dpaa2_io *service_s - } - - /** -+ * dpaa2_io_service_select() - return a dpaa2_io service affined to this cpu -+ * @cpu: the cpu id -+ * -+ * Return the affine dpaa2_io service, or NULL if there is no service affined -+ * to the specified cpu. If DPAA2_IO_ANY_CPU is used, return the next available -+ * service. -+ */ -+struct dpaa2_io *dpaa2_io_service_select(int cpu) -+{ -+ if (cpu == DPAA2_IO_ANY_CPU) -+ return service_select(NULL); -+ -+ return service_select_by_cpu(NULL, cpu); -+} -+EXPORT_SYMBOL_GPL(dpaa2_io_service_select); -+ -+/** - * dpaa2_io_create() - create a dpaa2_io object. - * @desc: the dpaa2_io descriptor -+ * @dev: the actual DPIO device - * - * Activates a "struct dpaa2_io" corresponding to the given config of an actual - * DPIO object. - * - * Return a valid dpaa2_io object for success, or NULL for failure. - */ --struct dpaa2_io *dpaa2_io_create(const struct dpaa2_io_desc *desc) -+struct dpaa2_io *dpaa2_io_create(const struct dpaa2_io_desc *desc, -+ struct device *dev) - { - struct dpaa2_io *obj = kmalloc(sizeof(*obj), GFP_KERNEL); - -@@ -126,7 +124,6 @@ struct dpaa2_io *dpaa2_io_create(const s - return NULL; - } - -- atomic_set(&obj->refs, 1); - obj->dpio_desc = *desc; - obj->swp_desc.cena_bar = obj->dpio_desc.regs_cena; - obj->swp_desc.cinh_bar = obj->dpio_desc.regs_cinh; -@@ -156,9 +153,10 @@ struct dpaa2_io *dpaa2_io_create(const s - dpio_by_cpu[desc->cpu] = obj; - spin_unlock(&dpio_list_lock); - -+ obj->dev = dev; -+ - return obj; - } --EXPORT_SYMBOL(dpaa2_io_create); - - /** - * dpaa2_io_down() - release the dpaa2_io object. -@@ -171,11 +169,8 @@ EXPORT_SYMBOL(dpaa2_io_create); - */ - void dpaa2_io_down(struct dpaa2_io *d) - { -- if (!atomic_dec_and_test(&d->refs)) -- return; - kfree(d); - } --EXPORT_SYMBOL(dpaa2_io_down); - - #define DPAA_POLL_MAX 32 - -@@ -206,7 +201,7 @@ irqreturn_t dpaa2_io_irq(struct dpaa2_io - u64 q64; - - q64 = qbman_result_SCN_ctx(dq); -- ctx = (void *)q64; -+ ctx = (void *)(uintptr_t)q64; - ctx->cb(ctx); - } else { - pr_crit("fsl-mc-dpio: Unrecognised/ignored DQRR entry\n"); -@@ -222,13 +217,19 @@ done: - qbman_swp_interrupt_set_inhibit(swp, 0); - return IRQ_HANDLED; - } --EXPORT_SYMBOL(dpaa2_io_irq); -+ -+int dpaa2_io_get_cpu(struct dpaa2_io *d) -+{ -+ return d->dpio_desc.cpu; -+} -+EXPORT_SYMBOL(dpaa2_io_get_cpu); - - /** - * dpaa2_io_service_register() - Prepare for servicing of FQDAN or CDAN - * notifications on the given DPIO service. - * @d: the given DPIO service. - * @ctx: the notification context. -+ * @dev: the device that requests the register - * - * The caller should make the MC command to attach a DPAA2 object to - * a DPIO after this function completes successfully. In that way: -@@ -243,7 +244,8 @@ EXPORT_SYMBOL(dpaa2_io_irq); - * Return 0 for success, or -ENODEV for failure. - */ - int dpaa2_io_service_register(struct dpaa2_io *d, -- struct dpaa2_io_notification_ctx *ctx) -+ struct dpaa2_io_notification_ctx *ctx, -+ struct device *dev) - { - unsigned long irqflags; - -@@ -251,8 +253,10 @@ int dpaa2_io_service_register(struct dpa - if (!d) - return -ENODEV; - -+ device_link_add(dev, d->dev, DL_FLAG_AUTOREMOVE_SUPPLIER); -+ - ctx->dpio_id = d->dpio_desc.dpio_id; -- ctx->qman64 = (u64)ctx; -+ ctx->qman64 = (u64)(uintptr_t)ctx; - ctx->dpio_private = d; - spin_lock_irqsave(&d->lock_notifications, irqflags); - list_add(&ctx->node, &d->notifications); -@@ -263,20 +267,23 @@ int dpaa2_io_service_register(struct dpa - return qbman_swp_CDAN_set_context_enable(d->swp, - (u16)ctx->id, - ctx->qman64); -+ - return 0; - } --EXPORT_SYMBOL(dpaa2_io_service_register); -+EXPORT_SYMBOL_GPL(dpaa2_io_service_register); - - /** - * dpaa2_io_service_deregister - The opposite of 'register'. - * @service: the given DPIO service. - * @ctx: the notification context. -+ * @dev: the device that requests to be deregistered - * - * This function should be called only after sending the MC command to - * to detach the notification-producing device from the DPIO. - */ - void dpaa2_io_service_deregister(struct dpaa2_io *service, -- struct dpaa2_io_notification_ctx *ctx) -+ struct dpaa2_io_notification_ctx *ctx, -+ struct device *dev) - { - struct dpaa2_io *d = ctx->dpio_private; - unsigned long irqflags; -@@ -287,8 +294,10 @@ void dpaa2_io_service_deregister(struct - spin_lock_irqsave(&d->lock_notifications, irqflags); - list_del(&ctx->node); - spin_unlock_irqrestore(&d->lock_notifications, irqflags); -+ -+ device_link_remove(dev, d->dev); - } --EXPORT_SYMBOL(dpaa2_io_service_deregister); -+EXPORT_SYMBOL_GPL(dpaa2_io_service_deregister); - - /** - * dpaa2_io_service_rearm() - Rearm the notification for the given DPIO service. -@@ -322,7 +331,7 @@ int dpaa2_io_service_rearm(struct dpaa2_ - - return err; - } --EXPORT_SYMBOL(dpaa2_io_service_rearm); -+EXPORT_SYMBOL_GPL(dpaa2_io_service_rearm); - - /** - * dpaa2_io_service_pull_fq() - pull dequeue functions from a fq. -@@ -385,7 +394,7 @@ int dpaa2_io_service_pull_channel(struct - - return err; - } --EXPORT_SYMBOL(dpaa2_io_service_pull_channel); -+EXPORT_SYMBOL_GPL(dpaa2_io_service_pull_channel); - - /** - * dpaa2_io_service_enqueue_fq() - Enqueue a frame to a frame queue. -@@ -441,7 +450,7 @@ int dpaa2_io_service_enqueue_qd(struct d - - return qbman_swp_enqueue(d->swp, &ed, fd); - } --EXPORT_SYMBOL(dpaa2_io_service_enqueue_qd); -+EXPORT_SYMBOL_GPL(dpaa2_io_service_enqueue_qd); - - /** - * dpaa2_io_service_release() - Release buffers to a buffer pool. -@@ -453,7 +462,7 @@ EXPORT_SYMBOL(dpaa2_io_service_enqueue_q - * Return 0 for success, and negative error code for failure. - */ - int dpaa2_io_service_release(struct dpaa2_io *d, -- u32 bpid, -+ u16 bpid, - const u64 *buffers, - unsigned int num_buffers) - { -@@ -468,7 +477,7 @@ int dpaa2_io_service_release(struct dpaa - - return qbman_swp_release(d->swp, &rd, buffers, num_buffers); - } --EXPORT_SYMBOL(dpaa2_io_service_release); -+EXPORT_SYMBOL_GPL(dpaa2_io_service_release); - - /** - * dpaa2_io_service_acquire() - Acquire buffers from a buffer pool. -@@ -482,7 +491,7 @@ EXPORT_SYMBOL(dpaa2_io_service_release); - * Eg. if the buffer pool is empty, this will return zero. - */ - int dpaa2_io_service_acquire(struct dpaa2_io *d, -- u32 bpid, -+ u16 bpid, - u64 *buffers, - unsigned int num_buffers) - { -@@ -499,7 +508,7 @@ int dpaa2_io_service_acquire(struct dpaa - - return err; - } --EXPORT_SYMBOL(dpaa2_io_service_acquire); -+EXPORT_SYMBOL_GPL(dpaa2_io_service_acquire); - - /* - * 'Stores' are reusable memory blocks for holding dequeue results, and to -@@ -553,7 +562,7 @@ struct dpaa2_io_store *dpaa2_io_store_cr - - return ret; - } --EXPORT_SYMBOL(dpaa2_io_store_create); -+EXPORT_SYMBOL_GPL(dpaa2_io_store_create); - - /** - * dpaa2_io_store_destroy() - Frees the dma memory storage for dequeue -@@ -567,7 +576,7 @@ void dpaa2_io_store_destroy(struct dpaa2 - kfree(s->alloced_addr); - kfree(s); - } --EXPORT_SYMBOL(dpaa2_io_store_destroy); -+EXPORT_SYMBOL_GPL(dpaa2_io_store_destroy); - - /** - * dpaa2_io_store_next() - Determine when the next dequeue result is available. -@@ -610,9 +619,193 @@ struct dpaa2_dq *dpaa2_io_store_next(str - if (!(dpaa2_dq_flags(ret) & DPAA2_DQ_STAT_VALIDFRAME)) - ret = NULL; - } else { -+ prefetch(&s->vaddr[s->idx]); - *is_last = 0; - } - - return ret; - } --EXPORT_SYMBOL(dpaa2_io_store_next); -+EXPORT_SYMBOL_GPL(dpaa2_io_store_next); -+ -+/** -+ * dpaa2_io_query_fq_count() - Get the frame and byte count for a given fq. -+ * @d: the given DPIO object. -+ * @fqid: the id of frame queue to be queried. -+ * @fcnt: the queried frame count. -+ * @bcnt: the queried byte count. -+ * -+ * Knowing the FQ count at run-time can be useful in debugging situations. -+ * The instantaneous frame- and byte-count are hereby returned. -+ * -+ * Return 0 for a successful query, and negative error code if query fails. -+ */ -+int dpaa2_io_query_fq_count(struct dpaa2_io *d, u32 fqid, -+ u32 *fcnt, u32 *bcnt) -+{ -+ struct qbman_fq_query_np_rslt state; -+ struct qbman_swp *swp; -+ unsigned long irqflags; -+ int ret; -+ -+ d = service_select(d); -+ if (!d) -+ return -ENODEV; -+ -+ swp = d->swp; -+ spin_lock_irqsave(&d->lock_mgmt_cmd, irqflags); -+ ret = qbman_fq_query_state(swp, fqid, &state); -+ spin_unlock_irqrestore(&d->lock_mgmt_cmd, irqflags); -+ if (ret) -+ return ret; -+ *fcnt = qbman_fq_state_frame_count(&state); -+ *bcnt = qbman_fq_state_byte_count(&state); -+ -+ return 0; -+} -+EXPORT_SYMBOL_GPL(dpaa2_io_query_fq_count); -+ -+/** -+ * dpaa2_io_query_bp_count() - Query the number of buffers currently in a -+ * buffer pool. -+ * @d: the given DPIO object. -+ * @bpid: the index of buffer pool to be queried. -+ * @num: the queried number of buffers in the buffer pool. -+ * -+ * Return 0 for a successful query, and negative error code if query fails. -+ */ -+int dpaa2_io_query_bp_count(struct dpaa2_io *d, u16 bpid, u32 *num) -+{ -+ struct qbman_bp_query_rslt state; -+ struct qbman_swp *swp; -+ unsigned long irqflags; -+ int ret; -+ -+ d = service_select(d); -+ if (!d) -+ return -ENODEV; -+ -+ swp = d->swp; -+ spin_lock_irqsave(&d->lock_mgmt_cmd, irqflags); -+ ret = qbman_bp_query(swp, bpid, &state); -+ spin_unlock_irqrestore(&d->lock_mgmt_cmd, irqflags); -+ if (ret) -+ return ret; -+ *num = qbman_bp_info_num_free_bufs(&state); -+ return 0; -+} -+EXPORT_SYMBOL_GPL(dpaa2_io_query_bp_count); -+ -+/** -+ * dpaa2_io_service_enqueue_orp_fq() - Enqueue a frame to a frame queue with -+ * order restoration -+ * @d: the given DPIO service. -+ * @fqid: the given frame queue id. -+ * @fd: the frame descriptor which is enqueued. -+ * @orpid: the order restoration point ID -+ * @seqnum: the order sequence number -+ * @last: must be set for the final frame if seqnum is shared (spilt frame) -+ * -+ * Performs an enqueue to a frame queue using the specified order restoration -+ * point. The QMan device will ensure the order of frames placed on the -+ * queue will be ordered as per the sequence number. -+ * -+ * In the case a frame is split it is possible to enqueue using the same -+ * sequence number more than once. The final frame in a shared sequence number -+ * most be indicated by setting last = 1. For non shared sequence numbers -+ * last = 1 must always be set. -+ * -+ * Return 0 for successful enqueue, or -EBUSY if the enqueue ring is not ready, -+ * or -ENODEV if there is no dpio service. -+ */ -+int dpaa2_io_service_enqueue_orp_fq(struct dpaa2_io *d, u32 fqid, -+ const struct dpaa2_fd *fd, u16 orpid, -+ u16 seqnum, int last) -+{ -+ struct qbman_eq_desc ed; -+ -+ d = service_select(d); -+ if (!d) -+ return -ENODEV; -+ qbman_eq_desc_clear(&ed); -+ qbman_eq_desc_set_orp(&ed, 0, orpid, seqnum, !last); -+ qbman_eq_desc_set_fq(&ed, fqid); -+ return qbman_swp_enqueue(d->swp, &ed, fd); -+} -+EXPORT_SYMBOL(dpaa2_io_service_enqueue_orp_fq); -+ -+/** -+ * dpaa2_io_service_enqueue_orp_qd() - Enqueue a frame to a queueing destination -+ * with order restoration -+ * @d: the given DPIO service. -+ * @qdid: the given queuing destination id. -+ * @fd: the frame descriptor which is enqueued. -+ * @orpid: the order restoration point ID -+ * @seqnum: the order sequence number -+ * @last: must be set for the final frame if seqnum is shared (spilt frame) -+ * -+ * Performs an enqueue to a frame queue using the specified order restoration -+ * point. The QMan device will ensure the order of frames placed on the -+ * queue will be ordered as per the sequence number. -+ * -+ * In the case a frame is split it is possible to enqueue using the same -+ * sequence number more than once. The final frame in a shared sequence number -+ * most be indicated by setting last = 1. For non shared sequence numbers -+ * last = 1 must always be set. -+ * -+ * Return 0 for successful enqueue, or -EBUSY if the enqueue ring is not ready, -+ * or -ENODEV if there is no dpio service. -+ */ -+int dpaa2_io_service_enqueue_orp_qd(struct dpaa2_io *d, u32 qdid, u8 prio, -+ u16 qdbin, const struct dpaa2_fd *fd, -+ u16 orpid, u16 seqnum, int last) -+{ -+ struct qbman_eq_desc ed; -+ -+ d = service_select(d); -+ if (!d) -+ return -ENODEV; -+ qbman_eq_desc_clear(&ed); -+ qbman_eq_desc_set_orp(&ed, 0, orpid, seqnum, !last); -+ qbman_eq_desc_set_qd(&ed, qdid, qdbin, prio); -+ return qbman_swp_enqueue(d->swp, &ed, fd); -+} -+EXPORT_SYMBOL_GPL(dpaa2_io_service_enqueue_orp_qd); -+ -+/** -+ * dpaa2_io_service_orp_seqnum_drop() - Remove a sequence number from -+ * an order restoration list -+ * @d: the given DPIO service. -+ * @orpid: Order restoration point to remove a sequence number from -+ * @seqnum: Sequence number to remove -+ * -+ * Removes a frames sequence number from an order restoration point without -+ * enqueing the frame. Used to indicate that the order restoration hardware -+ * should not expect to see this sequence number. Typically used to indicate -+ * a frame was terminated or dropped from a flow. -+ * -+ * Return 0 for successful enqueue, or -EBUSY if the enqueue ring is not ready, -+ * or -ENODEV if there is no dpio service. -+ */ -+int dpaa2_io_service_orp_seqnum_drop(struct dpaa2_io *d, u16 orpid, u16 seqnum) -+{ -+ struct qbman_eq_desc ed; -+ struct dpaa2_fd fd; -+ unsigned long irqflags; -+ int ret; -+ -+ d = service_select(d); -+ if (!d) -+ return -ENODEV; -+ -+ if ((d->swp->desc->qman_version & QMAN_REV_MASK) >= QMAN_REV_5000) { -+ spin_lock_irqsave(&d->lock_mgmt_cmd, irqflags); -+ ret = qbman_orp_drop(d->swp, orpid, seqnum); -+ spin_unlock_irqrestore(&d->lock_mgmt_cmd, irqflags); -+ return ret; -+ } -+ -+ qbman_eq_desc_clear(&ed); -+ qbman_eq_desc_set_orp_hole(&ed, orpid, seqnum); -+ return qbman_swp_enqueue(d->swp, &ed, &fd); -+} -+EXPORT_SYMBOL_GPL(dpaa2_io_service_orp_seqnum_drop); ---- a/drivers/staging/fsl-mc/bus/dpio/dpio.c -+++ b/drivers/staging/fsl-mc/bus/dpio/dpio.c -@@ -1,34 +1,8 @@ -+// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) - /* - * Copyright 2013-2016 Freescale Semiconductor Inc. - * Copyright 2016 NXP - * -- * Redistribution and use in source and binary forms, with or without -- * modification, are permitted provided that the following conditions are met: -- * * Redistributions of source code must retain the above copyright -- * notice, this list of conditions and the following disclaimer. -- * * Redistributions in binary form must reproduce the above copyright -- * notice, this list of conditions and the following disclaimer in the -- * documentation and/or other materials provided with the distribution. -- * * Neither the name of the above-listed copyright holders nor the -- * names of any contributors may be used to endorse or promote products -- * derived from this software without specific prior written permission. -- * -- * ALTERNATIVELY, this software may be distributed under the terms of the -- * GNU General Public License ("GPL") as published by the Free Software -- * Foundation, either version 2 of that License or (at your option) any -- * later version. -- * -- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" -- * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE -- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE -- * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE -- * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR -- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF -- * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS -- * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN -- * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) -- * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE -- * POSSIBILITY OF SUCH DAMAGE. - */ - #include <linux/kernel.h> - #include "../../include/mc.h" -@@ -222,3 +196,26 @@ int dpio_get_api_version(struct fsl_mc_i - - return 0; - } -+ -+/** -+ * dpio_reset() - Reset the DPIO, returns the object to initial state. -+ * @mc_io: Pointer to MC portal's I/O object -+ * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_' -+ * @token: Token of DPIO object -+ * -+ * Return: '0' on Success; Error code otherwise. -+ */ -+int dpio_reset(struct fsl_mc_io *mc_io, -+ u32 cmd_flags, -+ u16 token) -+{ -+ struct fsl_mc_command cmd = { 0 }; -+ -+ /* prepare command */ -+ cmd.header = mc_encode_cmd_header(DPIO_CMDID_RESET, -+ cmd_flags, -+ token); -+ -+ /* send command to mc*/ -+ return mc_send_command(mc_io, &cmd); -+} ---- a/drivers/staging/fsl-mc/bus/dpio/dpio.h -+++ b/drivers/staging/fsl-mc/bus/dpio/dpio.h -@@ -1,34 +1,8 @@ -+/* SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) */ - /* - * Copyright 2013-2016 Freescale Semiconductor Inc. - * Copyright 2016 NXP - * -- * Redistribution and use in source and binary forms, with or without -- * modification, are permitted provided that the following conditions are met: -- * * Redistributions of source code must retain the above copyright -- * notice, this list of conditions and the following disclaimer. -- * * Redistributions in binary form must reproduce the above copyright -- * notice, this list of conditions and the following disclaimer in the -- * documentation and/or other materials provided with the distribution. -- * * Neither the name of the above-listed copyright holders nor the -- * names of any contributors may be used to endorse or promote products -- * derived from this software without specific prior written permission. -- * -- * ALTERNATIVELY, this software may be distributed under the terms of the -- * GNU General Public License ("GPL") as published by the Free Software -- * Foundation, either version 2 of that License or (at your option) any -- * later version. -- * -- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" -- * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE -- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE -- * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE -- * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR -- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF -- * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS -- * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN -- * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) -- * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE -- * POSSIBILITY OF SUCH DAMAGE. - */ - #ifndef __FSL_DPIO_H - #define __FSL_DPIO_H -@@ -106,4 +80,8 @@ int dpio_get_api_version(struct fsl_mc_i - u16 *major_ver, - u16 *minor_ver); - -+int dpio_reset(struct fsl_mc_io *mc_io, -+ u32 cmd_flags, -+ u16 token); -+ - #endif /* __FSL_DPIO_H */ ---- a/drivers/staging/fsl-mc/bus/dpio/qbman-portal.c -+++ b/drivers/staging/fsl-mc/bus/dpio/qbman-portal.c -@@ -1,33 +1,8 @@ -+// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) - /* - * Copyright (C) 2014-2016 Freescale Semiconductor, Inc. - * Copyright 2016 NXP - * -- * Redistribution and use in source and binary forms, with or without -- * modification, are permitted provided that the following conditions are met: -- * * Redistributions of source code must retain the above copyright -- * notice, this list of conditions and the following disclaimer. -- * * Redistributions in binary form must reproduce the above copyright -- * notice, this list of conditions and the following disclaimer in the -- * documentation and/or other materials provided with the distribution. -- * * Neither the name of Freescale Semiconductor nor the -- * names of its contributors may be used to endorse or promote products -- * derived from this software without specific prior written permission. -- * -- * ALTERNATIVELY, this software may be distributed under the terms of the -- * GNU General Public License ("GPL") as published by the Free Software -- * Foundation, either version 2 of that License or (at your option) any -- * later version. -- * -- * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY -- * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED -- * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE -- * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY -- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES -- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; -- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND -- * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS -- * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - - #include <asm/cacheflush.h> -@@ -37,23 +12,26 @@ - - #include "qbman-portal.h" - --#define QMAN_REV_4000 0x04000000 --#define QMAN_REV_4100 0x04010000 --#define QMAN_REV_4101 0x04010001 --#define QMAN_REV_MASK 0xffff0000 -- - /* All QBMan command and result structures use this "valid bit" encoding */ - #define QB_VALID_BIT ((u32)0x80) - - /* QBMan portal management command codes */ - #define QBMAN_MC_ACQUIRE 0x30 - #define QBMAN_WQCHAN_CONFIGURE 0x46 -+#define QBMAN_MC_ORP 0x63 - - /* CINH register offsets */ -+#define QBMAN_CINH_SWP_EQCR_PI 0x800 - #define QBMAN_CINH_SWP_EQAR 0x8c0 -+#define QBMAN_CINH_SWP_CR_RT 0x900 -+#define QBMAN_CINH_SWP_VDQCR_RT 0x940 -+#define QBMAN_CINH_SWP_EQCR_AM_RT 0x980 -+#define QBMAN_CINH_SWP_RCR_AM_RT 0x9c0 - #define QBMAN_CINH_SWP_DQPI 0xa00 - #define QBMAN_CINH_SWP_DCAP 0xac0 - #define QBMAN_CINH_SWP_SDQCR 0xb00 -+#define QBMAN_CINH_SWP_EQCR_AM_RT2 0xb40 -+#define QBMAN_CINH_SWP_RCR_PI 0xc00 - #define QBMAN_CINH_SWP_RAR 0xcc0 - #define QBMAN_CINH_SWP_ISR 0xe00 - #define QBMAN_CINH_SWP_IER 0xe40 -@@ -68,6 +46,13 @@ - #define QBMAN_CENA_SWP_RR(vb) (0x700 + ((u32)(vb) >> 1)) - #define QBMAN_CENA_SWP_VDQCR 0x780 - -+/* CENA register offsets in memory-backed mode */ -+#define QBMAN_CENA_SWP_DQRR_MEM(n) (0x800 + ((u32)(n) << 6)) -+#define QBMAN_CENA_SWP_RCR_MEM(n) (0x1400 + ((u32)(n) << 6)) -+#define QBMAN_CENA_SWP_CR_MEM 0x1600 -+#define QBMAN_CENA_SWP_RR_MEM 0x1680 -+#define QBMAN_CENA_SWP_VDQCR_MEM 0x1780 -+ - /* Reverse mapping of QBMAN_CENA_SWP_DQRR() */ - #define QBMAN_IDX_FROM_DQRR(p) (((unsigned long)(p) & 0x1ff) >> 6) - -@@ -99,6 +84,14 @@ enum qbman_sdqcr_fc { - qbman_sdqcr_fc_up_to_3 = 1 - }; - -+#define dccvac(p) { asm volatile("dc cvac, %0;" : : "r" (p) : "memory"); } -+#define dcivac(p) { asm volatile("dc ivac, %0" : : "r"(p) : "memory"); } -+static inline void qbman_inval_prefetch(struct qbman_swp *p, uint32_t offset) -+{ -+ dcivac(p->addr_cena + offset); -+ prefetch(p->addr_cena + offset); -+} -+ - /* Portal Access */ - - static inline u32 qbman_read_register(struct qbman_swp *p, u32 offset) -@@ -121,10 +114,13 @@ static inline void *qbman_get_cmd(struct - - #define SWP_CFG_DQRR_MF_SHIFT 20 - #define SWP_CFG_EST_SHIFT 16 -+#define SWP_CFG_CPBS_SHIFT 15 - #define SWP_CFG_WN_SHIFT 14 - #define SWP_CFG_RPM_SHIFT 12 - #define SWP_CFG_DCM_SHIFT 10 - #define SWP_CFG_EPM_SHIFT 8 -+#define SWP_CFG_VPM_SHIFT 7 -+#define SWP_CFG_CPM_SHIFT 6 - #define SWP_CFG_SD_SHIFT 5 - #define SWP_CFG_SP_SHIFT 4 - #define SWP_CFG_SE_SHIFT 3 -@@ -150,6 +146,8 @@ static inline u32 qbman_set_swp_cfg(u8 m - ep << SWP_CFG_EP_SHIFT); - } - -+#define QMAN_RT_MODE 0x00000100 -+ - /** - * qbman_swp_init() - Create a functional object representing the given - * QBMan portal descriptor. -@@ -171,6 +169,8 @@ struct qbman_swp *qbman_swp_init(const s - p->sdq |= qbman_sdqcr_dct_prio_ics << QB_SDQCR_DCT_SHIFT; - p->sdq |= qbman_sdqcr_fc_up_to_3 << QB_SDQCR_FC_SHIFT; - p->sdq |= QMAN_SDQCR_TOKEN << QB_SDQCR_TOK_SHIFT; -+ if ((p->desc->qman_version & QMAN_REV_MASK) >= QMAN_REV_5000) -+ p->mr.valid_bit = QB_VALID_BIT; - - atomic_set(&p->vdq.available, 1); - p->vdq.valid_bit = QB_VALID_BIT; -@@ -188,8 +188,11 @@ struct qbman_swp *qbman_swp_init(const s - p->addr_cena = d->cena_bar; - p->addr_cinh = d->cinh_bar; - -+ if ((p->desc->qman_version & QMAN_REV_MASK) >= QMAN_REV_5000) -+ memset(p->addr_cena, 0, 64 * 1024); -+ - reg = qbman_set_swp_cfg(p->dqrr.dqrr_size, -- 1, /* Writes Non-cacheable */ -+ 0, /* Writes cacheable */ - 0, /* EQCR_CI stashing threshold */ - 3, /* RPM: Valid bit mode, RCR in array mode */ - 2, /* DCM: Discrete consumption ack mode */ -@@ -200,6 +203,10 @@ struct qbman_swp *qbman_swp_init(const s - 1, /* dequeue stashing priority == TRUE */ - 0, /* dequeue stashing enable == FALSE */ - 0); /* EQCR_CI stashing priority == FALSE */ -+ if ((p->desc->qman_version & QMAN_REV_MASK) >= QMAN_REV_5000) -+ reg |= 1 << SWP_CFG_CPBS_SHIFT | /* memory-backed mode */ -+ 1 << SWP_CFG_VPM_SHIFT | /* VDQCR read triggered mode */ -+ 1 << SWP_CFG_CPM_SHIFT; /* CR read triggered mode */ - - qbman_write_register(p, QBMAN_CINH_SWP_CFG, reg); - reg = qbman_read_register(p, QBMAN_CINH_SWP_CFG); -@@ -208,6 +215,10 @@ struct qbman_swp *qbman_swp_init(const s - return NULL; - } - -+ if ((p->desc->qman_version & QMAN_REV_MASK) >= QMAN_REV_5000) { -+ qbman_write_register(p, QBMAN_CINH_SWP_EQCR_PI, QMAN_RT_MODE); -+ qbman_write_register(p, QBMAN_CINH_SWP_RCR_PI, QMAN_RT_MODE); -+ } - /* - * SDQCR needs to be initialized to 0 when no channels are - * being dequeued from or else the QMan HW will indicate an -@@ -302,7 +313,10 @@ void qbman_swp_interrupt_set_inhibit(str - */ - void *qbman_swp_mc_start(struct qbman_swp *p) - { -- return qbman_get_cmd(p, QBMAN_CENA_SWP_CR); -+ if ((p->desc->qman_version & QMAN_REV_MASK) < QMAN_REV_5000) -+ return qbman_get_cmd(p, QBMAN_CENA_SWP_CR); -+ else -+ return qbman_get_cmd(p, QBMAN_CENA_SWP_CR_MEM); - } - - /* -@@ -313,8 +327,15 @@ void qbman_swp_mc_submit(struct qbman_sw - { - u8 *v = cmd; - -- dma_wmb(); -- *v = cmd_verb | p->mc.valid_bit; -+ if ((p->desc->qman_version & QMAN_REV_MASK) < QMAN_REV_5000) { -+ dma_wmb(); -+ *v = cmd_verb | p->mc.valid_bit; -+ dccvac(cmd); -+ } else { -+ *v = cmd_verb | p->mc.valid_bit; -+ dma_wmb(); -+ qbman_write_register(p, QBMAN_CINH_SWP_CR_RT, QMAN_RT_MODE); -+ } - } - - /* -@@ -325,13 +346,28 @@ void *qbman_swp_mc_result(struct qbman_s - { - u32 *ret, verb; - -- ret = qbman_get_cmd(p, QBMAN_CENA_SWP_RR(p->mc.valid_bit)); -+ if ((p->desc->qman_version & QMAN_REV_MASK) < QMAN_REV_5000) { -+ qbman_inval_prefetch(p, QBMAN_CENA_SWP_RR(p->mc.valid_bit)); -+ ret = qbman_get_cmd(p, QBMAN_CENA_SWP_RR(p->mc.valid_bit)); -+ /* Remove the valid-bit - command completed if the rest -+ * is non-zero. -+ */ -+ verb = ret[0] & ~QB_VALID_BIT; -+ if (!verb) -+ return NULL; -+ p->mc.valid_bit ^= QB_VALID_BIT; -+ } else { -+ ret = qbman_get_cmd(p, QBMAN_CENA_SWP_RR_MEM); -+ /* Command completed if the valid bit is toggled */ -+ if (p->mr.valid_bit != (ret[0] & QB_VALID_BIT)) -+ return NULL; -+ /* Command completed if the rest is non-zero */ -+ verb = ret[0] & ~QB_VALID_BIT; -+ if (!verb) -+ return NULL; -+ p->mr.valid_bit ^= QB_VALID_BIT; -+ } - -- /* Remove the valid-bit - command completed if the rest is non-zero */ -- verb = ret[0] & ~QB_VALID_BIT; -- if (!verb) -- return NULL; -- p->mc.valid_bit ^= QB_VALID_BIT; - return ret; - } - -@@ -370,6 +406,43 @@ void qbman_eq_desc_set_no_orp(struct qbm - d->verb |= enqueue_rejects_to_fq; - } - -+/** -+ * qbman_eq_desc_set_orp() - Set order-restoration in the enqueue descriptor -+ * @d: the enqueue descriptor. -+ * @response_success: 1 = enqueue with response always; 0 = enqueue with -+ * rejections returned on a FQ. -+ * @oprid: the order point record id. -+ * @seqnum: the order restoration sequence number. -+ * @incomplete: indicates whether this is the last fragments using the same -+ * sequence number. -+ */ -+void qbman_eq_desc_set_orp(struct qbman_eq_desc *d, int respond_success, -+ u16 oprid, u16 seqnum, int incomplete) -+{ -+ d->verb |= (1 << QB_ENQUEUE_CMD_ORP_ENABLE_SHIFT); -+ if (respond_success) -+ d->verb |= enqueue_response_always; -+ else -+ d->verb |= enqueue_rejects_to_fq; -+ d->orpid = cpu_to_le16(oprid); -+ d->seqnum = cpu_to_le16((!!incomplete << 14) | seqnum); -+} -+ -+/** -+ * qbman_eq_desc_set_orp_hole() - fill a hole in the order-restoration sequence -+ * without any enqueue -+ * @d: the enqueue descriptor. -+ * @oprid: the order point record id. -+ * @seqnum: the order restoration sequence number. -+ */ -+void qbman_eq_desc_set_orp_hole(struct qbman_eq_desc *d, u16 oprid, -+ u16 seqnum) -+{ -+ d->verb |= (1 << QB_ENQUEUE_CMD_ORP_ENABLE_SHIFT) | enqueue_empty; -+ d->orpid = cpu_to_le16(oprid); -+ d->seqnum = cpu_to_le16(seqnum); -+} -+ - /* - * Exactly one of the following descriptor "targets" should be set. (Calling any - * one of these will replace the effect of any prior call to one of these.) -@@ -408,6 +481,18 @@ void qbman_eq_desc_set_qd(struct qbman_e - #define EQAR_VB(eqar) ((eqar) & 0x80) - #define EQAR_SUCCESS(eqar) ((eqar) & 0x100) - -+static inline void qbman_write_eqcr_am_rt_register(struct qbman_swp *p, -+ u8 idx) -+{ -+ if (idx < 16) -+ qbman_write_register(p, QBMAN_CINH_SWP_EQCR_AM_RT + idx * 4, -+ QMAN_RT_MODE); -+ else -+ qbman_write_register(p, QBMAN_CINH_SWP_EQCR_AM_RT2 + -+ (idx - 16) * 4, -+ QMAN_RT_MODE); -+} -+ - /** - * qbman_swp_enqueue() - Issue an enqueue command - * @s: the software portal used for enqueue -@@ -429,12 +514,29 @@ int qbman_swp_enqueue(struct qbman_swp * - return -EBUSY; - - p = qbman_get_cmd(s, QBMAN_CENA_SWP_EQCR(EQAR_IDX(eqar))); -- memcpy(&p->dca, &d->dca, 31); -+ /* This is mapped as DEVICE type memory, writes are -+ * with address alignment: -+ * desc.dca address alignment = 1 -+ * desc.seqnum address alignment = 2 -+ * desc.orpid address alignment = 4 -+ * desc.tgtid address alignment = 8 -+ */ -+ p->dca = d->dca; -+ p->seqnum = d->seqnum; -+ p->orpid = d->orpid; -+ memcpy(&p->tgtid, &d->tgtid, 24); - memcpy(&p->fd, fd, sizeof(*fd)); - -- /* Set the verb byte, have to substitute in the valid-bit */ -- dma_wmb(); -- p->verb = d->verb | EQAR_VB(eqar); -+ if ((s->desc->qman_version & QMAN_REV_MASK) < QMAN_REV_5000) { -+ /* Set the verb byte, have to substitute in the valid-bit */ -+ dma_wmb(); -+ p->verb = d->verb | EQAR_VB(eqar); -+ dccvac(p); -+ } else { -+ p->verb = d->verb | EQAR_VB(eqar); -+ dma_wmb(); -+ qbman_write_eqcr_am_rt_register(s, EQAR_IDX(eqar)); -+ } - - return 0; - } -@@ -522,7 +624,7 @@ void qbman_pull_desc_set_storage(struct - int stash) - { - /* save the virtual address */ -- d->rsp_addr_virt = (u64)storage; -+ d->rsp_addr_virt = (u64)(uintptr_t)storage; - - if (!storage) { - d->verb &= ~(1 << QB_VDQCR_VERB_RLS_SHIFT); -@@ -615,18 +717,28 @@ int qbman_swp_pull(struct qbman_swp *s, - atomic_inc(&s->vdq.available); - return -EBUSY; - } -- s->vdq.storage = (void *)d->rsp_addr_virt; -- p = qbman_get_cmd(s, QBMAN_CENA_SWP_VDQCR); -+ s->vdq.storage = (void *)(uintptr_t)d->rsp_addr_virt; -+ if ((s->desc->qman_version & QMAN_REV_MASK) < QMAN_REV_5000) -+ p = qbman_get_cmd(s, QBMAN_CENA_SWP_VDQCR); -+ else -+ p = qbman_get_cmd(s, QBMAN_CENA_SWP_VDQCR_MEM); - p->numf = d->numf; - p->tok = QMAN_DQ_TOKEN_VALID; - p->dq_src = d->dq_src; - p->rsp_addr = d->rsp_addr; - p->rsp_addr_virt = d->rsp_addr_virt; -- dma_wmb(); -- -- /* Set the verb byte, have to substitute in the valid-bit */ -- p->verb = d->verb | s->vdq.valid_bit; -- s->vdq.valid_bit ^= QB_VALID_BIT; -+ if ((s->desc->qman_version & QMAN_REV_MASK) < QMAN_REV_5000) { -+ dma_wmb(); -+ /* Set the verb byte, have to substitute in the valid-bit */ -+ p->verb = d->verb | s->vdq.valid_bit; -+ s->vdq.valid_bit ^= QB_VALID_BIT; -+ dccvac(p); -+ } else { -+ p->verb = d->verb | s->vdq.valid_bit; -+ s->vdq.valid_bit ^= QB_VALID_BIT; -+ dma_wmb(); -+ qbman_write_register(s, QBMAN_CINH_SWP_VDQCR_RT, QMAN_RT_MODE); -+ } - - return 0; - } -@@ -680,11 +792,13 @@ const struct dpaa2_dq *qbman_swp_dqrr_ne - s->dqrr.next_idx, pi); - s->dqrr.reset_bug = 0; - } -- prefetch(qbman_get_cmd(s, -- QBMAN_CENA_SWP_DQRR(s->dqrr.next_idx))); -+ qbman_inval_prefetch(s, QBMAN_CENA_SWP_DQRR(s->dqrr.next_idx)); - } - -- p = qbman_get_cmd(s, QBMAN_CENA_SWP_DQRR(s->dqrr.next_idx)); -+ if ((s->desc->qman_version & QMAN_REV_MASK) < QMAN_REV_5000) -+ p = qbman_get_cmd(s, QBMAN_CENA_SWP_DQRR(s->dqrr.next_idx)); -+ else -+ p = qbman_get_cmd(s, QBMAN_CENA_SWP_DQRR_MEM(s->dqrr.next_idx)); - verb = p->dq.verb; - - /* -@@ -696,8 +810,7 @@ const struct dpaa2_dq *qbman_swp_dqrr_ne - * knew from reading PI. - */ - if ((verb & QB_VALID_BIT) != s->dqrr.valid_bit) { -- prefetch(qbman_get_cmd(s, -- QBMAN_CENA_SWP_DQRR(s->dqrr.next_idx))); -+ qbman_inval_prefetch(s, QBMAN_CENA_SWP_DQRR(s->dqrr.next_idx)); - return NULL; - } - /* -@@ -720,7 +833,7 @@ const struct dpaa2_dq *qbman_swp_dqrr_ne - (flags & DPAA2_DQ_STAT_EXPIRED)) - atomic_inc(&s->vdq.available); - -- prefetch(qbman_get_cmd(s, QBMAN_CENA_SWP_DQRR(s->dqrr.next_idx))); -+ qbman_inval_prefetch(s, QBMAN_CENA_SWP_DQRR(s->dqrr.next_idx)); - - return p; - } -@@ -836,18 +949,29 @@ int qbman_swp_release(struct qbman_swp * - return -EBUSY; - - /* Start the release command */ -- p = qbman_get_cmd(s, QBMAN_CENA_SWP_RCR(RAR_IDX(rar))); -+ if ((s->desc->qman_version & QMAN_REV_MASK) < QMAN_REV_5000) -+ p = qbman_get_cmd(s, QBMAN_CENA_SWP_RCR(RAR_IDX(rar))); -+ else -+ p = qbman_get_cmd(s, QBMAN_CENA_SWP_RCR_MEM(RAR_IDX(rar))); - /* Copy the caller's buffer pointers to the command */ - for (i = 0; i < num_buffers; i++) - p->buf[i] = cpu_to_le64(buffers[i]); - p->bpid = d->bpid; - -- /* -- * Set the verb byte, have to substitute in the valid-bit and the number -- * of buffers. -- */ -- dma_wmb(); -- p->verb = d->verb | RAR_VB(rar) | num_buffers; -+ if ((s->desc->qman_version & QMAN_REV_MASK) < QMAN_REV_5000) { -+ /* -+ * Set the verb byte, have to substitute in the valid-bit -+ * and the number of buffers. -+ */ -+ dma_wmb(); -+ p->verb = d->verb | RAR_VB(rar) | num_buffers; -+ dccvac(p); -+ } else { -+ p->verb = d->verb | RAR_VB(rar) | num_buffers; -+ dma_wmb(); -+ qbman_write_register(s, QBMAN_CINH_SWP_RCR_AM_RT + -+ RAR_IDX(rar) * 4, QMAN_RT_MODE); -+ } - - return 0; - } -@@ -855,7 +979,7 @@ int qbman_swp_release(struct qbman_swp * - struct qbman_acquire_desc { - u8 verb; - u8 reserved; -- u16 bpid; -+ __le16 bpid; - u8 num; - u8 reserved2[59]; - }; -@@ -863,10 +987,10 @@ struct qbman_acquire_desc { - struct qbman_acquire_rslt { - u8 verb; - u8 rslt; -- u16 reserved; -+ __le16 reserved; - u8 num; - u8 reserved2[3]; -- u64 buf[7]; -+ __le64 buf[7]; - }; - - /** -@@ -929,7 +1053,7 @@ int qbman_swp_acquire(struct qbman_swp * - struct qbman_alt_fq_state_desc { - u8 verb; - u8 reserved[3]; -- u32 fqid; -+ __le32 fqid; - u8 reserved2[56]; - }; - -@@ -952,7 +1076,7 @@ int qbman_swp_alt_fq_state(struct qbman_ - if (!p) - return -EBUSY; - -- p->fqid = cpu_to_le32(fqid) & ALT_FQ_FQID_MASK; -+ p->fqid = cpu_to_le32(fqid & ALT_FQ_FQID_MASK); - - /* Complete the management command */ - r = qbman_swp_mc_complete(s, p, alt_fq_verb); -@@ -978,11 +1102,11 @@ int qbman_swp_alt_fq_state(struct qbman_ - struct qbman_cdan_ctrl_desc { - u8 verb; - u8 reserved; -- u16 ch; -+ __le16 ch; - u8 we; - u8 ctrl; -- u16 reserved2; -- u64 cdan_ctx; -+ __le16 reserved2; -+ __le64 cdan_ctx; - u8 reserved3[48]; - - }; -@@ -990,7 +1114,7 @@ struct qbman_cdan_ctrl_desc { - struct qbman_cdan_ctrl_rslt { - u8 verb; - u8 rslt; -- u16 ch; -+ __le16 ch; - u8 reserved[60]; - }; - -@@ -1031,5 +1155,152 @@ int qbman_swp_CDAN_set(struct qbman_swp - return -EIO; - } - -+ return 0; -+} -+ -+#define QBMAN_RESPONSE_VERB_MASK 0x7f -+#define QBMAN_FQ_QUERY_NP 0x45 -+#define QBMAN_BP_QUERY 0x32 -+ -+struct qbman_fq_query_desc { -+ u8 verb; -+ u8 reserved[3]; -+ __le32 fqid; -+ u8 reserved2[56]; -+}; -+ -+int qbman_fq_query_state(struct qbman_swp *s, u32 fqid, -+ struct qbman_fq_query_np_rslt *r) -+{ -+ struct qbman_fq_query_desc *p; -+ void *resp; -+ -+ p = (struct qbman_fq_query_desc *)qbman_swp_mc_start(s); -+ if (!p) -+ return -EBUSY; -+ -+ /* FQID is a 24 bit value */ -+ p->fqid = cpu_to_le32(fqid & 0x00FFFFFF); -+ resp = qbman_swp_mc_complete(s, p, QBMAN_FQ_QUERY_NP); -+ if (!resp) { -+ pr_err("qbman: Query FQID %d NP fields failed, no response\n", -+ fqid); -+ return -EIO; -+ } -+ *r = *(struct qbman_fq_query_np_rslt *)resp; -+ /* Decode the outcome */ -+ WARN_ON((r->verb & QBMAN_RESPONSE_VERB_MASK) != QBMAN_FQ_QUERY_NP); -+ -+ /* Determine success or failure */ -+ if (r->rslt != QBMAN_MC_RSLT_OK) { -+ pr_err("Query NP fields of FQID 0x%x failed, code=0x%02x\n", -+ p->fqid, r->rslt); -+ return -EIO; -+ } -+ -+ return 0; -+} -+ -+u32 qbman_fq_state_frame_count(const struct qbman_fq_query_np_rslt *r) -+{ -+ return (le32_to_cpu(r->frm_cnt) & 0x00FFFFFF); -+} -+ -+u32 qbman_fq_state_byte_count(const struct qbman_fq_query_np_rslt *r) -+{ -+ return le32_to_cpu(r->byte_cnt); -+} -+ -+struct qbman_bp_query_desc { -+ u8 verb; -+ u8 reserved; -+ __le16 bpid; -+ u8 reserved2[60]; -+}; -+ -+int qbman_bp_query(struct qbman_swp *s, u16 bpid, -+ struct qbman_bp_query_rslt *r) -+{ -+ struct qbman_bp_query_desc *p; -+ void *resp; -+ -+ p = (struct qbman_bp_query_desc *)qbman_swp_mc_start(s); -+ if (!p) -+ return -EBUSY; -+ -+ p->bpid = cpu_to_le16(bpid); -+ resp = qbman_swp_mc_complete(s, p, QBMAN_BP_QUERY); -+ if (!resp) { -+ pr_err("qbman: Query BPID %d fields failed, no response\n", -+ bpid); -+ return -EIO; -+ } -+ *r = *(struct qbman_bp_query_rslt *)resp; -+ /* Decode the outcome */ -+ WARN_ON((r->verb & QBMAN_RESPONSE_VERB_MASK) != QBMAN_BP_QUERY); -+ -+ /* Determine success or failure */ -+ if (r->rslt != QBMAN_MC_RSLT_OK) { -+ pr_err("Query fields of BPID 0x%x failed, code=0x%02x\n", -+ bpid, r->rslt); -+ return -EIO; -+ } -+ -+ return 0; -+} -+ -+u32 qbman_bp_info_num_free_bufs(struct qbman_bp_query_rslt *a) -+{ -+ return le32_to_cpu(a->fill); -+} -+ -+struct qbman_orp_cmd_desc { -+ u8 verb; -+ u8 reserved; -+ u8 cid; -+ u8 reserved2; -+ u16 orpid; -+ u16 seqnum; -+ u8 reserved3[56]; -+}; -+ -+struct qbman_orp_cmd_rslt { -+ u8 verb; -+ u8 rslt; -+ u8 cid; -+ u8 reserved1[61]; -+}; -+ -+int qbman_orp_drop(struct qbman_swp *s, u16 orpid, u16 seqnum) -+{ -+ struct qbman_orp_cmd_desc *p; -+ struct qbman_orp_cmd_rslt *r; -+ void *resp; -+ -+ p = (struct qbman_orp_cmd_desc *)qbman_swp_mc_start(s); -+ if (!p) -+ return -EBUSY; -+ -+ p->cid = 0x7; -+ p->orpid = cpu_to_le16(orpid); -+ p->seqnum = cpu_to_le16(seqnum); -+ -+ resp = qbman_swp_mc_complete(s, p, QBMAN_MC_ORP); -+ if (!resp) { -+ pr_err("qbman: Drop sequence num %d orpid 0x%x failed, no response\n", -+ seqnum, orpid); -+ return -EIO; -+ } -+ r = (struct qbman_orp_cmd_rslt *)resp; -+ /* Decode the outcome */ -+ WARN_ON((r->verb & QBMAN_RESPONSE_VERB_MASK) != QBMAN_MC_ORP); -+ -+ /* Determine success or failure */ -+ if (r->rslt != QBMAN_MC_RSLT_OK) { -+ pr_err("Drop seqnum %d of prpid 0x%x failed, code=0x%02x\n", -+ seqnum, orpid, r->rslt); -+ return -EIO; -+ } -+ - return 0; - } ---- a/drivers/staging/fsl-mc/bus/dpio/qbman-portal.h -+++ b/drivers/staging/fsl-mc/bus/dpio/qbman-portal.h -@@ -1,46 +1,28 @@ -+/* SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) */ - /* - * Copyright (C) 2014-2016 Freescale Semiconductor, Inc. -- * Copyright 2016 NXP -+ * Copyright 2016-2019 NXP - * -- * Redistribution and use in source and binary forms, with or without -- * modification, are permitted provided that the following conditions are met: -- * * Redistributions of source code must retain the above copyright -- * notice, this list of conditions and the following disclaimer. -- * * Redistributions in binary form must reproduce the above copyright -- * notice, this list of conditions and the following disclaimer in the -- * documentation and/or other materials provided with the distribution. -- * * Neither the name of Freescale Semiconductor nor the -- * names of its contributors may be used to endorse or promote products -- * derived from this software without specific prior written permission. -- * -- * ALTERNATIVELY, this software may be distributed under the terms of the -- * GNU General Public License ("GPL") as published by the Free Software -- * Foundation, either version 2 of that License or (at your option) any -- * later version. -- * -- * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY -- * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED -- * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE -- * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY -- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES -- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; -- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND -- * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS -- * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - #ifndef __FSL_QBMAN_PORTAL_H - #define __FSL_QBMAN_PORTAL_H - - #include "../../include/dpaa2-fd.h" - -+#define QMAN_REV_4000 0x04000000 -+#define QMAN_REV_4100 0x04010000 -+#define QMAN_REV_4101 0x04010001 -+#define QMAN_REV_5000 0x05000000 -+ -+#define QMAN_REV_MASK 0xffff0000 -+ - struct dpaa2_dq; - struct qbman_swp; - - /* qbman software portal descriptor structure */ - struct qbman_swp_desc { - void *cena_bar; /* Cache-enabled portal base address */ -- void *cinh_bar; /* Cache-inhibited portal base address */ -+ void __iomem *cinh_bar; /* Cache-inhibited portal base address */ - u32 qman_version; - }; - -@@ -57,8 +39,8 @@ struct qbman_pull_desc { - u8 numf; - u8 tok; - u8 reserved; -- u32 dq_src; -- u64 rsp_addr; -+ __le32 dq_src; -+ __le64 rsp_addr; - u64 rsp_addr_virt; - u8 padding[40]; - }; -@@ -95,17 +77,17 @@ enum qbman_pull_type_e { - struct qbman_eq_desc { - u8 verb; - u8 dca; -- u16 seqnum; -- u16 orpid; -- u16 reserved1; -- u32 tgtid; -- u32 tag; -- u16 qdbin; -+ __le16 seqnum; -+ __le16 orpid; -+ __le16 reserved1; -+ __le32 tgtid; -+ __le32 tag; -+ __le16 qdbin; - u8 qpri; - u8 reserved[3]; - u8 wae; - u8 rspid; -- u64 rsp_addr; -+ __le64 rsp_addr; - u8 fd[32]; - }; - -@@ -113,9 +95,9 @@ struct qbman_eq_desc { - struct qbman_release_desc { - u8 verb; - u8 reserved; -- u16 bpid; -- u32 reserved2; -- u64 buf[7]; -+ __le16 bpid; -+ __le32 reserved2; -+ __le64 buf[7]; - }; - - /* Management command result codes */ -@@ -127,7 +109,7 @@ struct qbman_release_desc { - /* portal data structure */ - struct qbman_swp { - const struct qbman_swp_desc *desc; -- void __iomem *addr_cena; -+ void *addr_cena; - void __iomem *addr_cinh; - - /* Management commands */ -@@ -135,6 +117,11 @@ struct qbman_swp { - u32 valid_bit; /* 0x00 or 0x80 */ - } mc; - -+ /* Management response */ -+ struct { -+ u32 valid_bit; /* 0x00 or 0x80 */ -+ } mr; -+ - /* Push dequeues */ - u32 sdq; - -@@ -187,6 +174,9 @@ int qbman_result_has_new_result(struct q - - void qbman_eq_desc_clear(struct qbman_eq_desc *d); - void qbman_eq_desc_set_no_orp(struct qbman_eq_desc *d, int respond_success); -+void qbman_eq_desc_set_orp(struct qbman_eq_desc *d, int respond_success, -+ u16 oprid, u16 seqnum, int incomplete); -+void qbman_eq_desc_set_orp_hole(struct qbman_eq_desc *d, u16 oprid, u16 seqnum); - void qbman_eq_desc_set_token(struct qbman_eq_desc *d, u8 token); - void qbman_eq_desc_set_fq(struct qbman_eq_desc *d, u32 fqid); - void qbman_eq_desc_set_qd(struct qbman_eq_desc *d, u32 qdid, -@@ -195,6 +185,8 @@ void qbman_eq_desc_set_qd(struct qbman_e - int qbman_swp_enqueue(struct qbman_swp *p, const struct qbman_eq_desc *d, - const struct dpaa2_fd *fd); - -+int qbman_orp_drop(struct qbman_swp *s, u16 orpid, u16 seqnum); -+ - void qbman_release_desc_clear(struct qbman_release_desc *d); - void qbman_release_desc_set_bpid(struct qbman_release_desc *d, u16 bpid); - void qbman_release_desc_set_rcdi(struct qbman_release_desc *d, int enable); -@@ -453,7 +445,7 @@ static inline int qbman_swp_CDAN_set_con - static inline void *qbman_swp_mc_complete(struct qbman_swp *swp, void *cmd, - u8 cmd_verb) - { -- int loopvar = 1000; -+ int loopvar = 2000; - - qbman_swp_mc_submit(swp, cmd, cmd_verb); - -@@ -466,4 +458,62 @@ static inline void *qbman_swp_mc_complet - return cmd; - } - -+/* Query APIs */ -+struct qbman_fq_query_np_rslt { -+ u8 verb; -+ u8 rslt; -+ u8 st1; -+ u8 st2; -+ u8 reserved[2]; -+ __le16 od1_sfdr; -+ __le16 od2_sfdr; -+ __le16 od3_sfdr; -+ __le16 ra1_sfdr; -+ __le16 ra2_sfdr; -+ __le32 pfdr_hptr; -+ __le32 pfdr_tptr; -+ __le32 frm_cnt; -+ __le32 byte_cnt; -+ __le16 ics_surp; -+ u8 is; -+ u8 reserved2[29]; -+}; -+ -+int qbman_fq_query_state(struct qbman_swp *s, u32 fqid, -+ struct qbman_fq_query_np_rslt *r); -+u32 qbman_fq_state_frame_count(const struct qbman_fq_query_np_rslt *r); -+u32 qbman_fq_state_byte_count(const struct qbman_fq_query_np_rslt *r); -+ -+struct qbman_bp_query_rslt { -+ u8 verb; -+ u8 rslt; -+ u8 reserved[4]; -+ u8 bdi; -+ u8 state; -+ __le32 fill; -+ __le32 hdotr; -+ __le16 swdet; -+ __le16 swdxt; -+ __le16 hwdet; -+ __le16 hwdxt; -+ __le16 swset; -+ __le16 swsxt; -+ __le16 vbpid; -+ __le16 icid; -+ __le64 bpscn_addr; -+ __le64 bpscn_ctx; -+ __le16 hw_targ; -+ u8 dbe; -+ u8 reserved2; -+ u8 sdcnt; -+ u8 hdcnt; -+ u8 sscnt; -+ u8 reserved3[9]; -+}; -+ -+int qbman_bp_query(struct qbman_swp *s, u16 bpid, -+ struct qbman_bp_query_rslt *r); -+ -+u32 qbman_bp_info_num_free_bufs(struct qbman_bp_query_rslt *a); -+ - #endif /* __FSL_QBMAN_PORTAL_H */ ---- a/drivers/staging/fsl-mc/bus/dpmcp.c -+++ b/drivers/staging/fsl-mc/bus/dpmcp.c -@@ -1,33 +1,7 @@ -+// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) - /* - * Copyright 2013-2016 Freescale Semiconductor Inc. - * -- * Redistribution and use in source and binary forms, with or without -- * modification, are permitted provided that the following conditions are met: -- * * Redistributions of source code must retain the above copyright -- * notice, this list of conditions and the following disclaimer. -- * * Redistributions in binary form must reproduce the above copyright -- * notice, this list of conditions and the following disclaimer in the -- * documentation and/or other materials provided with the distribution. -- * * Neither the name of the above-listed copyright holders nor the -- * names of any contributors may be used to endorse or promote products -- * derived from this software without specific prior written permission. -- * -- * ALTERNATIVELY, this software may be distributed under the terms of the -- * GNU General Public License ("GPL") as published by the Free Software -- * Foundation, either version 2 of that License or (at your option) any -- * later version. -- * -- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" -- * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE -- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE -- * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE -- * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR -- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF -- * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS -- * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN -- * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) -- * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE -- * POSSIBILITY OF SUCH DAMAGE. - */ - #include <linux/kernel.h> - #include "../include/mc.h" ---- a/drivers/staging/fsl-mc/bus/dprc-driver.c -+++ b/drivers/staging/fsl-mc/bus/dprc-driver.c -@@ -1,12 +1,10 @@ -+// SPDX-License-Identifier: GPL-2.0 - /* - * Freescale data path resource container (DPRC) driver - * - * Copyright (C) 2014-2016 Freescale Semiconductor, Inc. - * Author: German Rivera <German.Rivera@freescale.com> - * -- * This file is licensed under the terms of the GNU General Public -- * License version 2. This program is licensed "as is" without any -- * warranty of any kind, whether express or implied. - */ - - #include <linux/module.h> ---- a/drivers/staging/fsl-mc/bus/dprc.c -+++ b/drivers/staging/fsl-mc/bus/dprc.c -@@ -1,33 +1,7 @@ -+// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) - /* - * Copyright 2013-2016 Freescale Semiconductor Inc. - * -- * Redistribution and use in source and binary forms, with or without -- * modification, are permitted provided that the following conditions are met: -- * * Redistributions of source code must retain the above copyright -- * notice, this list of conditions and the following disclaimer. -- * * Redistributions in binary form must reproduce the above copyright -- * notice, this list of conditions and the following disclaimer in the -- * documentation and/or other materials provided with the distribution. -- * * Neither the name of the above-listed copyright holders nor the -- * names of any contributors may be used to endorse or promote products -- * derived from this software without specific prior written permission. -- * -- * ALTERNATIVELY, this software may be distributed under the terms of the -- * GNU General Public License ("GPL") as published by the Free Software -- * Foundation, either version 2 of that License or (at your option) any -- * later version. -- * -- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" -- * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE -- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE -- * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE -- * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR -- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF -- * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS -- * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN -- * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) -- * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE -- * POSSIBILITY OF SUCH DAMAGE. - */ - #include <linux/kernel.h> - #include "../include/mc.h" ---- a/drivers/staging/fsl-mc/bus/fsl-mc-allocator.c -+++ b/drivers/staging/fsl-mc/bus/fsl-mc-allocator.c -@@ -1,11 +1,9 @@ -+// SPDX-License-Identifier: GPL-2.0 - /* - * fsl-mc object allocator driver - * - * Copyright (C) 2013-2016 Freescale Semiconductor, Inc. - * -- * This file is licensed under the terms of the GNU General Public -- * License version 2. This program is licensed "as is" without any -- * warranty of any kind, whether express or implied. - */ - - #include <linux/module.h> ---- a/drivers/staging/fsl-mc/bus/fsl-mc-bus.c -+++ b/drivers/staging/fsl-mc/bus/fsl-mc-bus.c -@@ -1,12 +1,10 @@ -+// SPDX-License-Identifier: GPL-2.0 - /* - * Freescale Management Complex (MC) bus driver - * - * Copyright (C) 2014-2016 Freescale Semiconductor, Inc. - * Author: German Rivera <German.Rivera@freescale.com> - * -- * This file is licensed under the terms of the GNU General Public -- * License version 2. This program is licensed "as is" without any -- * warranty of any kind, whether express or implied. - */ - - #define pr_fmt(fmt) "fsl-mc: " fmt ---- a/drivers/staging/fsl-mc/bus/fsl-mc-msi.c -+++ b/drivers/staging/fsl-mc/bus/fsl-mc-msi.c -@@ -1,12 +1,10 @@ -+// SPDX-License-Identifier: GPL-2.0 - /* - * Freescale Management Complex (MC) bus driver MSI support - * - * Copyright (C) 2015-2016 Freescale Semiconductor, Inc. - * Author: German Rivera <German.Rivera@freescale.com> - * -- * This file is licensed under the terms of the GNU General Public -- * License version 2. This program is licensed "as is" without any -- * warranty of any kind, whether express or implied. - */ - - #include <linux/of_device.h> ---- a/drivers/staging/fsl-mc/bus/fsl-mc-private.h -+++ b/drivers/staging/fsl-mc/bus/fsl-mc-private.h -@@ -1,11 +1,9 @@ -+/* SPDX-License-Identifier: GPL-2.0 */ - /* - * Freescale Management Complex (MC) bus private declarations - * - * Copyright (C) 2016 Freescale Semiconductor, Inc. - * -- * This file is licensed under the terms of the GNU General Public -- * License version 2. This program is licensed "as is" without any -- * warranty of any kind, whether express or implied. - */ - #ifndef _FSL_MC_PRIVATE_H_ - #define _FSL_MC_PRIVATE_H_ ---- a/drivers/staging/fsl-mc/bus/irq-gic-v3-its-fsl-mc-msi.c -+++ b/drivers/staging/fsl-mc/bus/irq-gic-v3-its-fsl-mc-msi.c -@@ -1,12 +1,10 @@ -+// SPDX-License-Identifier: GPL-2.0 - /* - * Freescale Management Complex (MC) bus driver MSI support - * - * Copyright (C) 2015-2016 Freescale Semiconductor, Inc. - * Author: German Rivera <German.Rivera@freescale.com> - * -- * This file is licensed under the terms of the GNU General Public -- * License version 2. This program is licensed "as is" without any -- * warranty of any kind, whether express or implied. - */ - - #include <linux/of_device.h> ---- a/drivers/staging/fsl-mc/bus/mc-io.c -+++ b/drivers/staging/fsl-mc/bus/mc-io.c -@@ -1,33 +1,7 @@ -+// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) - /* - * Copyright 2013-2016 Freescale Semiconductor Inc. - * -- * Redistribution and use in source and binary forms, with or without -- * modification, are permitted provided that the following conditions are met: -- * * Redistributions of source code must retain the above copyright -- * notice, this list of conditions and the following disclaimer. -- * * Redistributions in binary form must reproduce the above copyright -- * notice, this list of conditions and the following disclaimer in the -- * documentation and/or other materials provided with the distribution. -- * * Neither the name of the above-listed copyright holders nor the -- * names of any contributors may be used to endorse or promote products -- * derived from this software without specific prior written permission. -- * -- * ALTERNATIVELY, this software may be distributed under the terms of the -- * GNU General Public License ("GPL") as published by the Free Software -- * Foundation, either version 2 of that License or (at your option) any -- * later version. -- * -- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" -- * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE -- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE -- * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE -- * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR -- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF -- * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS -- * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN -- * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) -- * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE -- * POSSIBILITY OF SUCH DAMAGE. - */ - - #include <linux/io.h> ---- a/drivers/staging/fsl-mc/bus/mc-sys.c -+++ b/drivers/staging/fsl-mc/bus/mc-sys.c -@@ -1,35 +1,9 @@ -+// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) - /* - * Copyright 2013-2016 Freescale Semiconductor Inc. - * - * I/O services to send MC commands to the MC hardware - * -- * Redistribution and use in source and binary forms, with or without -- * modification, are permitted provided that the following conditions are met: -- * * Redistributions of source code must retain the above copyright -- * notice, this list of conditions and the following disclaimer. -- * * Redistributions in binary form must reproduce the above copyright -- * notice, this list of conditions and the following disclaimer in the -- * documentation and/or other materials provided with the distribution. -- * * Neither the name of the above-listed copyright holders nor the -- * names of any contributors may be used to endorse or promote products -- * derived from this software without specific prior written permission. -- * -- * ALTERNATIVELY, this software may be distributed under the terms of the -- * GNU General Public License ("GPL") as published by the Free Software -- * Foundation, either version 2 of that License or (at your option) any -- * later version. -- * -- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" -- * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE -- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE -- * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE -- * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR -- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF -- * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS -- * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN -- * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) -- * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE -- * POSSIBILITY OF SUCH DAMAGE. - */ - - #include <linux/delay.h> ---- a/drivers/staging/fsl-mc/include/dpaa2-fd.h -+++ b/drivers/staging/fsl-mc/include/dpaa2-fd.h -@@ -1,33 +1,8 @@ -+/* SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) */ - /* - * Copyright 2014-2016 Freescale Semiconductor Inc. - * Copyright 2016 NXP - * -- * Redistribution and use in source and binary forms, with or without -- * modification, are permitted provided that the following conditions are met: -- * * Redistributions of source code must retain the above copyright -- * notice, this list of conditions and the following disclaimer. -- * * Redistributions in binary form must reproduce the above copyright -- * notice, this list of conditions and the following disclaimer in the -- * documentation and/or other materials provided with the distribution. -- * * Neither the name of Freescale Semiconductor nor the -- * names of its contributors may be used to endorse or promote products -- * derived from this software without specific prior written permission. -- * -- * ALTERNATIVELY, this software may be distributed under the terms of the -- * GNU General Public License ("GPL") as published by the Free Software -- * Foundation, either version 2 of that License or (at your option) any -- * later version. -- * -- * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY -- * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED -- * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE -- * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY -- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES -- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; -- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND -- * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS -- * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - #ifndef __FSL_DPAA2_FD_H - #define __FSL_DPAA2_FD_H -@@ -91,6 +66,27 @@ struct dpaa2_fd { - #define SG_BPID_MASK 0x3FFF - #define SG_FINAL_FLAG_MASK 0x1 - #define SG_FINAL_FLAG_SHIFT 15 -+#define FL_SHORT_LEN_FLAG_MASK 0x1 -+#define FL_SHORT_LEN_FLAG_SHIFT 14 -+#define FL_SHORT_LEN_MASK 0x3FFFF -+#define FL_OFFSET_MASK 0x0FFF -+#define FL_FORMAT_MASK 0x3 -+#define FL_FORMAT_SHIFT 12 -+#define FL_BPID_MASK 0x3FFF -+#define FL_FINAL_FLAG_MASK 0x1 -+#define FL_FINAL_FLAG_SHIFT 15 -+ -+/* Error bits in FD CTRL */ -+#define FD_CTRL_ERR_MASK 0x000000FF -+#define FD_CTRL_UFD 0x00000004 -+#define FD_CTRL_SBE 0x00000008 -+#define FD_CTRL_FLC 0x00000010 -+#define FD_CTRL_FSE 0x00000020 -+#define FD_CTRL_FAERR 0x00000040 -+ -+/* Annotation bits in FD CTRL */ -+#define FD_CTRL_PTA 0x00800000 -+#define FD_CTRL_PTV1 0x00400000 - - enum dpaa2_fd_format { - dpaa2_fd_single = 0, -@@ -312,7 +308,7 @@ enum dpaa2_sg_format { - */ - static inline dma_addr_t dpaa2_sg_get_addr(const struct dpaa2_sg_entry *sg) - { -- return le64_to_cpu((dma_addr_t)sg->addr); -+ return (dma_addr_t)le64_to_cpu(sg->addr); - } - - /** -@@ -443,9 +439,243 @@ static inline bool dpaa2_sg_is_final(con - */ - static inline void dpaa2_sg_set_final(struct dpaa2_sg_entry *sg, bool final) - { -- sg->format_offset &= cpu_to_le16(~(SG_FINAL_FLAG_MASK -- << SG_FINAL_FLAG_SHIFT)); -+ sg->format_offset &= cpu_to_le16((~(SG_FINAL_FLAG_MASK -+ << SG_FINAL_FLAG_SHIFT)) & 0xFFFF); - sg->format_offset |= cpu_to_le16(final << SG_FINAL_FLAG_SHIFT); - } - -+/** -+ * struct dpaa2_fl_entry - structure for frame list entry. -+ * @addr: address in the FLE -+ * @len: length in the FLE -+ * @bpid: buffer pool ID -+ * @format_offset: format, offset, and short-length fields -+ * @frc: frame context -+ * @ctrl: control bits...including pta, pvt1, pvt2, err, etc -+ * @flc: flow context address -+ */ -+struct dpaa2_fl_entry { -+ __le64 addr; -+ __le32 len; -+ __le16 bpid; -+ __le16 format_offset; -+ __le32 frc; -+ __le32 ctrl; -+ __le64 flc; -+}; -+ -+enum dpaa2_fl_format { -+ dpaa2_fl_single = 0, -+ dpaa2_fl_res, -+ dpaa2_fl_sg -+}; -+ -+/** -+ * dpaa2_fl_get_addr() - get the addr field of FLE -+ * @fle: the given frame list entry -+ * -+ * Return the address in the frame list entry. -+ */ -+static inline dma_addr_t dpaa2_fl_get_addr(const struct dpaa2_fl_entry *fle) -+{ -+ return (dma_addr_t)le64_to_cpu(fle->addr); -+} -+ -+/** -+ * dpaa2_fl_set_addr() - Set the addr field of FLE -+ * @fle: the given frame list entry -+ * @addr: the address needs to be set in frame list entry -+ */ -+static inline void dpaa2_fl_set_addr(struct dpaa2_fl_entry *fle, -+ dma_addr_t addr) -+{ -+ fle->addr = cpu_to_le64(addr); -+} -+ -+/** -+ * dpaa2_fl_get_frc() - Get the frame context in the FLE -+ * @fle: the given frame list entry -+ * -+ * Return the frame context field in the frame lsit entry. -+ */ -+static inline u32 dpaa2_fl_get_frc(const struct dpaa2_fl_entry *fle) -+{ -+ return le32_to_cpu(fle->frc); -+} -+ -+/** -+ * dpaa2_fl_set_frc() - Set the frame context in the FLE -+ * @fle: the given frame list entry -+ * @frc: the frame context needs to be set in frame list entry -+ */ -+static inline void dpaa2_fl_set_frc(struct dpaa2_fl_entry *fle, u32 frc) -+{ -+ fle->frc = cpu_to_le32(frc); -+} -+ -+/** -+ * dpaa2_fl_get_ctrl() - Get the control bits in the FLE -+ * @fle: the given frame list entry -+ * -+ * Return the control bits field in the frame list entry. -+ */ -+static inline u32 dpaa2_fl_get_ctrl(const struct dpaa2_fl_entry *fle) -+{ -+ return le32_to_cpu(fle->ctrl); -+} -+ -+/** -+ * dpaa2_fl_set_ctrl() - Set the control bits in the FLE -+ * @fle: the given frame list entry -+ * @ctrl: the control bits to be set in the frame list entry -+ */ -+static inline void dpaa2_fl_set_ctrl(struct dpaa2_fl_entry *fle, u32 ctrl) -+{ -+ fle->ctrl = cpu_to_le32(ctrl); -+} -+ -+/** -+ * dpaa2_fl_get_flc() - Get the flow context in the FLE -+ * @fle: the given frame list entry -+ * -+ * Return the flow context in the frame list entry. -+ */ -+static inline dma_addr_t dpaa2_fl_get_flc(const struct dpaa2_fl_entry *fle) -+{ -+ return (dma_addr_t)le64_to_cpu(fle->flc); -+} -+ -+/** -+ * dpaa2_fl_set_flc() - Set the flow context field of FLE -+ * @fle: the given frame list entry -+ * @flc_addr: the flow context needs to be set in frame list entry -+ */ -+static inline void dpaa2_fl_set_flc(struct dpaa2_fl_entry *fle, -+ dma_addr_t flc_addr) -+{ -+ fle->flc = cpu_to_le64(flc_addr); -+} -+ -+static inline bool dpaa2_fl_short_len(const struct dpaa2_fl_entry *fle) -+{ -+ return !!((le16_to_cpu(fle->format_offset) >> -+ FL_SHORT_LEN_FLAG_SHIFT) & FL_SHORT_LEN_FLAG_MASK); -+} -+ -+/** -+ * dpaa2_fl_get_len() - Get the length in the FLE -+ * @fle: the given frame list entry -+ * -+ * Return the length field in the frame list entry. -+ */ -+static inline u32 dpaa2_fl_get_len(const struct dpaa2_fl_entry *fle) -+{ -+ if (dpaa2_fl_short_len(fle)) -+ return le32_to_cpu(fle->len) & FL_SHORT_LEN_MASK; -+ -+ return le32_to_cpu(fle->len); -+} -+ -+/** -+ * dpaa2_fl_set_len() - Set the length field of FLE -+ * @fle: the given frame list entry -+ * @len: the length needs to be set in frame list entry -+ */ -+static inline void dpaa2_fl_set_len(struct dpaa2_fl_entry *fle, u32 len) -+{ -+ fle->len = cpu_to_le32(len); -+} -+ -+/** -+ * dpaa2_fl_get_offset() - Get the offset field in the frame list entry -+ * @fle: the given frame list entry -+ * -+ * Return the offset. -+ */ -+static inline u16 dpaa2_fl_get_offset(const struct dpaa2_fl_entry *fle) -+{ -+ return le16_to_cpu(fle->format_offset) & FL_OFFSET_MASK; -+} -+ -+/** -+ * dpaa2_fl_set_offset() - Set the offset field of FLE -+ * @fle: the given frame list entry -+ * @offset: the offset needs to be set in frame list entry -+ */ -+static inline void dpaa2_fl_set_offset(struct dpaa2_fl_entry *fle, u16 offset) -+{ -+ fle->format_offset &= cpu_to_le16(~FL_OFFSET_MASK); -+ fle->format_offset |= cpu_to_le16(offset); -+} -+ -+/** -+ * dpaa2_fl_get_format() - Get the format field in the FLE -+ * @fle: the given frame list entry -+ * -+ * Return the format. -+ */ -+static inline enum dpaa2_fl_format dpaa2_fl_get_format( -+ const struct dpaa2_fl_entry *fle) -+{ -+ return (enum dpaa2_fl_format)((le16_to_cpu(fle->format_offset) >> -+ FL_FORMAT_SHIFT) & FL_FORMAT_MASK); -+} -+ -+/** -+ * dpaa2_fl_set_format() - Set the format field of FLE -+ * @fle: the given frame list entry -+ * @format: the format needs to be set in frame list entry -+ */ -+static inline void dpaa2_fl_set_format(struct dpaa2_fl_entry *fle, -+ enum dpaa2_fl_format format) -+{ -+ fle->format_offset &= cpu_to_le16(~(FL_FORMAT_MASK << FL_FORMAT_SHIFT)); -+ fle->format_offset |= cpu_to_le16(format << FL_FORMAT_SHIFT); -+} -+ -+/** -+ * dpaa2_fl_get_bpid() - Get the bpid field in the FLE -+ * @fle: the given frame list entry -+ * -+ * Return the buffer pool id. -+ */ -+static inline u16 dpaa2_fl_get_bpid(const struct dpaa2_fl_entry *fle) -+{ -+ return le16_to_cpu(fle->bpid) & FL_BPID_MASK; -+} -+ -+/** -+ * dpaa2_fl_set_bpid() - Set the bpid field of FLE -+ * @fle: the given frame list entry -+ * @bpid: buffer pool id to be set -+ */ -+static inline void dpaa2_fl_set_bpid(struct dpaa2_fl_entry *fle, u16 bpid) -+{ -+ fle->bpid &= cpu_to_le16(~(FL_BPID_MASK)); -+ fle->bpid |= cpu_to_le16(bpid); -+} -+ -+/** -+ * dpaa2_fl_is_final() - Check final bit in FLE -+ * @fle: the given frame list entry -+ * -+ * Return bool. -+ */ -+static inline bool dpaa2_fl_is_final(const struct dpaa2_fl_entry *fle) -+{ -+ return !!(le16_to_cpu(fle->format_offset) >> FL_FINAL_FLAG_SHIFT); -+} -+ -+/** -+ * dpaa2_fl_set_final() - Set the final bit in FLE -+ * @fle: the given frame list entry -+ * @final: the final boolean to be set -+ */ -+static inline void dpaa2_fl_set_final(struct dpaa2_fl_entry *fle, bool final) -+{ -+ fle->format_offset &= cpu_to_le16(~(FL_FINAL_FLAG_MASK << -+ FL_FINAL_FLAG_SHIFT)); -+ fle->format_offset |= cpu_to_le16(final << FL_FINAL_FLAG_SHIFT); -+} -+ - #endif /* __FSL_DPAA2_FD_H */ ---- a/drivers/staging/fsl-mc/include/dpaa2-global.h -+++ b/drivers/staging/fsl-mc/include/dpaa2-global.h -@@ -1,33 +1,8 @@ -+/* SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) */ - /* - * Copyright 2014-2016 Freescale Semiconductor Inc. - * Copyright 2016 NXP - * -- * Redistribution and use in source and binary forms, with or without -- * modification, are permitted provided that the following conditions are met: -- * * Redistributions of source code must retain the above copyright -- * notice, this list of conditions and the following disclaimer. -- * * Redistributions in binary form must reproduce the above copyright -- * notice, this list of conditions and the following disclaimer in the -- * documentation and/or other materials provided with the distribution. -- * * Neither the name of Freescale Semiconductor nor the -- * names of its contributors may be used to endorse or promote products -- * derived from this software without specific prior written permission. -- * -- * ALTERNATIVELY, this software may be distributed under the terms of the -- * GNU General Public License ("GPL") as published by the Free Software -- * Foundation, either version 2 of that License or (at your option) any -- * later version. -- * -- * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY -- * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED -- * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE -- * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY -- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES -- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; -- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND -- * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS -- * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - #ifndef __FSL_DPAA2_GLOBAL_H - #define __FSL_DPAA2_GLOBAL_H ---- a/drivers/staging/fsl-mc/include/dpaa2-io.h -+++ b/drivers/staging/fsl-mc/include/dpaa2-io.h -@@ -1,33 +1,8 @@ -+/* SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) */ - /* - * Copyright 2014-2016 Freescale Semiconductor Inc. -- * Copyright NXP -+ * Copyright 2017 NXP - * -- * Redistribution and use in source and binary forms, with or without -- * modification, are permitted provided that the following conditions are met: -- * * Redistributions of source code must retain the above copyright -- * notice, this list of conditions and the following disclaimer. -- * * Redistributions in binary form must reproduce the above copyright -- * notice, this list of conditions and the following disclaimer in the -- * documentation and/or other materials provided with the distribution. -- * * Neither the name of Freescale Semiconductor nor the -- * names of its contributors may be used to endorse or promote products -- * derived from this software without specific prior written permission. -- * -- * ALTERNATIVELY, this software may be distributed under the terms of the -- * GNU General Public License ("GPL") as published by the Free Software -- * Foundation, either version 2 of that License or (at your option) any -- * later version. -- * -- * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY -- * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED -- * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE -- * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY -- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES -- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; -- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND -- * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS -- * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - #ifndef __FSL_DPAA2_IO_H - #define __FSL_DPAA2_IO_H -@@ -77,17 +52,20 @@ struct dpaa2_io_desc { - int has_8prio; - int cpu; - void *regs_cena; -- void *regs_cinh; -+ void __iomem *regs_cinh; - int dpio_id; - u32 qman_version; - }; - --struct dpaa2_io *dpaa2_io_create(const struct dpaa2_io_desc *desc); -+struct dpaa2_io *dpaa2_io_create(const struct dpaa2_io_desc *desc, -+ struct device *dev); - - void dpaa2_io_down(struct dpaa2_io *d); - - irqreturn_t dpaa2_io_irq(struct dpaa2_io *obj); - -+struct dpaa2_io *dpaa2_io_service_select(int cpu); -+ - /** - * struct dpaa2_io_notification_ctx - The DPIO notification context structure - * @cb: The callback to be invoked when the notification arrives -@@ -103,7 +81,7 @@ irqreturn_t dpaa2_io_irq(struct dpaa2_io - * Used when a FQDAN/CDAN registration is made by drivers. - */ - struct dpaa2_io_notification_ctx { -- void (*cb)(struct dpaa2_io_notification_ctx *); -+ void (*cb)(struct dpaa2_io_notification_ctx *ctx); - int is_cdan; - u32 id; - int desired_cpu; -@@ -113,10 +91,14 @@ struct dpaa2_io_notification_ctx { - void *dpio_private; - }; - -+int dpaa2_io_get_cpu(struct dpaa2_io *d); -+ - int dpaa2_io_service_register(struct dpaa2_io *service, -- struct dpaa2_io_notification_ctx *ctx); -+ struct dpaa2_io_notification_ctx *ctx, -+ struct device *dev); - void dpaa2_io_service_deregister(struct dpaa2_io *service, -- struct dpaa2_io_notification_ctx *ctx); -+ struct dpaa2_io_notification_ctx *ctx, -+ struct device *dev); - int dpaa2_io_service_rearm(struct dpaa2_io *service, - struct dpaa2_io_notification_ctx *ctx); - -@@ -129,9 +111,9 @@ int dpaa2_io_service_enqueue_fq(struct d - const struct dpaa2_fd *fd); - int dpaa2_io_service_enqueue_qd(struct dpaa2_io *d, u32 qdid, u8 prio, - u16 qdbin, const struct dpaa2_fd *fd); --int dpaa2_io_service_release(struct dpaa2_io *d, u32 bpid, -+int dpaa2_io_service_release(struct dpaa2_io *d, u16 bpid, - const u64 *buffers, unsigned int num_buffers); --int dpaa2_io_service_acquire(struct dpaa2_io *d, u32 bpid, -+int dpaa2_io_service_acquire(struct dpaa2_io *d, u16 bpid, - u64 *buffers, unsigned int num_buffers); - - struct dpaa2_io_store *dpaa2_io_store_create(unsigned int max_frames, -@@ -139,4 +121,64 @@ struct dpaa2_io_store *dpaa2_io_store_cr - void dpaa2_io_store_destroy(struct dpaa2_io_store *s); - struct dpaa2_dq *dpaa2_io_store_next(struct dpaa2_io_store *s, int *is_last); - -+/* Order Restoration Support */ -+int dpaa2_io_service_enqueue_orp_fq(struct dpaa2_io *d, u32 fqid, -+ const struct dpaa2_fd *fd, u16 orpid, -+ u16 seqnum, int last); -+ -+int dpaa2_io_service_enqueue_orp_qd(struct dpaa2_io *d, u32 qdid, u8 prio, -+ u16 qdbin, const struct dpaa2_fd *fd, -+ u16 orpid, u16 seqnum, int last); -+ -+int dpaa2_io_service_orp_seqnum_drop(struct dpaa2_io *d, u16 orpid, -+ u16 seqnum); -+ -+/***************/ -+/* CSCN */ -+/***************/ -+ -+/** -+ * struct dpaa2_cscn - The CSCN message format -+ * @verb: identifies the type of message (should be 0x27). -+ * @stat: status bits related to dequeuing response (not used) -+ * @state: bit 0 = 0/1 if CG is no/is congested -+ * @reserved: reserved byte -+ * @cgid: congest grp ID - the first 16 bits -+ * @ctx: context data -+ * -+ * Congestion management can be implemented in software through -+ * the use of Congestion State Change Notifications (CSCN). These -+ * are messages written by DPAA2 hardware to memory whenever the -+ * instantaneous count (I_CNT field in the CG) exceeds the -+ * Congestion State (CS) entrance threshold, signifying congestion -+ * entrance, or when the instantaneous count returns below exit -+ * threshold, signifying congestion exit. The format of the message -+ * is given by the dpaa2_cscn structure. Bit 0 of the state field -+ * represents congestion state written by the hardware. -+ */ -+struct dpaa2_cscn { -+ u8 verb; -+ u8 stat; -+ u8 state; -+ u8 reserved; -+ __le32 cgid; -+ __le64 ctx; -+}; -+ -+#define DPAA2_CSCN_SIZE 64 -+#define DPAA2_CSCN_ALIGN 16 -+ -+#define DPAA2_CSCN_STATE_MASK 0x1 -+#define DPAA2_CSCN_CONGESTED 1 -+ -+static inline bool dpaa2_cscn_state_congested(struct dpaa2_cscn *cscn) -+{ -+ return ((cscn->state & DPAA2_CSCN_STATE_MASK) == DPAA2_CSCN_CONGESTED); -+} -+ -+int dpaa2_io_query_fq_count(struct dpaa2_io *d, u32 fqid, -+ u32 *fcnt, u32 *bcnt); -+int dpaa2_io_query_bp_count(struct dpaa2_io *d, u16 bpid, -+ u32 *num); -+ - #endif /* __FSL_DPAA2_IO_H */ ---- a/drivers/staging/fsl-mc/include/dpbp.h -+++ b/drivers/staging/fsl-mc/include/dpbp.h -@@ -1,34 +1,7 @@ -+/* SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) */ - /* - * Copyright 2013-2016 Freescale Semiconductor Inc. - * -- * Redistribution and use in source and binary forms, with or without -- * modification, are permitted provided that the following conditions are met: -- * * Redistributions of source code must retain the above copyright -- * notice, this list of conditions and the following disclaimer. -- * * Redistributions in binary form must reproduce the above copyright -- * notice, this list of conditions and the following disclaimer in the -- * documentation and/or other materials provided with the distribution. -- * * Neither the name of the above-listed copyright holders nor the -- * names of any contributors may be used to endorse or promote products -- * derived from this software without specific prior written permission. -- * -- * -- * ALTERNATIVELY, this software may be distributed under the terms of the -- * GNU General Public License ("GPL") as published by the Free Software -- * Foundation, either version 2 of that License or (at your option) any -- * later version. -- * -- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" -- * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE -- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE -- * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE -- * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR -- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF -- * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS -- * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN -- * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) -- * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE -- * POSSIBILITY OF SUCH DAMAGE. - */ - #ifndef __FSL_DPBP_H - #define __FSL_DPBP_H ---- a/drivers/staging/fsl-mc/include/dpcon.h -+++ b/drivers/staging/fsl-mc/include/dpcon.h -@@ -1,33 +1,7 @@ --/* Copyright 2013-2016 Freescale Semiconductor Inc. -+/* SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) */ -+/* -+ * Copyright 2013-2016 Freescale Semiconductor Inc. - * -- * Redistribution and use in source and binary forms, with or without -- * modification, are permitted provided that the following conditions are met: -- * * Redistributions of source code must retain the above copyright -- * notice, this list of conditions and the following disclaimer. -- * * Redistributions in binary form must reproduce the above copyright -- * notice, this list of conditions and the following disclaimer in the -- * documentation and/or other materials provided with the distribution. -- * * Neither the name of the above-listed copyright holders nor the -- * names of any contributors may be used to endorse or promote products -- * derived from this software without specific prior written permission. -- * -- * -- * ALTERNATIVELY, this software may be distributed under the terms of the -- * GNU General Public License ("GPL") as published by the Free Software -- * Foundation, either version 2 of that License or (at your option) any -- * later version. -- * -- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" -- * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE -- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE -- * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE -- * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR -- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF -- * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS -- * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN -- * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) -- * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE -- * POSSIBILITY OF SUCH DAMAGE. - */ - #ifndef __FSL_DPCON_H - #define __FSL_DPCON_H ---- /dev/null -+++ b/drivers/staging/fsl-mc/include/dpopr.h -@@ -0,0 +1,110 @@ -+/* -+ * Copyright 2017 NXP -+ * -+ * Redistribution and use in source and binary forms, with or without -+ * modification, are permitted provided that the following conditions are met: -+ * * Redistributions of source code must retain the above copyright -+ * notice, this list of conditions and the following disclaimer. -+ * * Redistributions in binary form must reproduce the above copyright -+ * notice, this list of conditions and the following disclaimer in the -+ * documentation and/or other materials provided with the distribution. -+ * * Neither the name of the above-listed copyright holders nor the -+ * names of any contributors may be used to endorse or promote products -+ * derived from this software without specific prior written permission. -+ * -+ * -+ * ALTERNATIVELY, this software may be distributed under the terms of the -+ * GNU General Public License ("GPL") as published by the Free Software -+ * Foundation, either version 2 of that License or (at your option) any -+ * later version. -+ * -+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" -+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE -+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE -+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE -+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR -+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF -+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS -+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN -+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) -+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE -+ * POSSIBILITY OF SUCH DAMAGE. -+ */ -+#ifndef __FSL_DPOPR_H_ -+#define __FSL_DPOPR_H_ -+ -+/* Data Path Order Restoration API -+ * Contains initialization APIs and runtime APIs for the Order Restoration -+ */ -+ -+/** Order Restoration properties */ -+ -+/** -+ * Create a new Order Point Record option -+ */ -+#define OPR_OPT_CREATE 0x1 -+/** -+ * Retire an existing Order Point Record option -+ */ -+#define OPR_OPT_RETIRE 0x2 -+ -+/** -+ * struct opr_cfg - Structure representing OPR configuration -+ * @oprrws: Order point record (OPR) restoration window size (0 to 5) -+ * 0 - Window size is 32 frames. -+ * 1 - Window size is 64 frames. -+ * 2 - Window size is 128 frames. -+ * 3 - Window size is 256 frames. -+ * 4 - Window size is 512 frames. -+ * 5 - Window size is 1024 frames. -+ * @oa: OPR auto advance NESN window size (0 disabled, 1 enabled) -+ * @olws: OPR acceptable late arrival window size (0 to 3) -+ * 0 - Disabled. Late arrivals are always rejected. -+ * 1 - Window size is 32 frames. -+ * 2 - Window size is the same as the OPR restoration -+ * window size configured in the OPRRWS field. -+ * 3 - Window size is 8192 frames. Late arrivals are -+ * always accepted. -+ * @oeane: Order restoration list (ORL) resource exhaustion -+ * advance NESN enable (0 disabled, 1 enabled) -+ * @oloe: OPR loose ordering enable (0 disabled, 1 enabled) -+ */ -+struct opr_cfg { -+ u8 oprrws; -+ u8 oa; -+ u8 olws; -+ u8 oeane; -+ u8 oloe; -+}; -+ -+/** -+ * struct opr_qry - Structure representing OPR configuration -+ * @enable: Enabled state -+ * @rip: Retirement In Progress -+ * @ndsn: Next dispensed sequence number -+ * @nesn: Next expected sequence number -+ * @ea_hseq: Early arrival head sequence number -+ * @hseq_nlis: HSEQ not last in sequence -+ * @ea_tseq: Early arrival tail sequence number -+ * @tseq_nlis: TSEQ not last in sequence -+ * @ea_tptr: Early arrival tail pointer -+ * @ea_hptr: Early arrival head pointer -+ * @opr_id: Order Point Record ID -+ * @opr_vid: Order Point Record Virtual ID -+ */ -+struct opr_qry { -+ char enable; -+ char rip; -+ u16 ndsn; -+ u16 nesn; -+ u16 ea_hseq; -+ char hseq_nlis; -+ u16 ea_tseq; -+ char tseq_nlis; -+ u16 ea_tptr; -+ u16 ea_hptr; -+ u16 opr_id; -+ u16 opr_vid; -+}; -+ -+#endif /* __FSL_DPOPR_H_ */ ---- a/drivers/staging/fsl-mc/include/mc.h -+++ b/drivers/staging/fsl-mc/include/mc.h -@@ -1,12 +1,10 @@ -+/* SPDX-License-Identifier: GPL-2.0 */ - /* - * Freescale Management Complex (MC) bus public interface - * - * Copyright (C) 2014-2016 Freescale Semiconductor, Inc. - * Author: German Rivera <German.Rivera@freescale.com> - * -- * This file is licensed under the terms of the GNU General Public -- * License version 2. This program is licensed "as is" without any -- * warranty of any kind, whether express or implied. - */ - #ifndef _FSL_MC_H_ - #define _FSL_MC_H_ |