diff options
Diffstat (limited to 'target/linux/lantiq')
| -rw-r--r-- | target/linux/lantiq/patches-4.14/0052-MIPS-lantiq-fix-usb-clocks.patch | 25 | ||||
| -rw-r--r-- | target/linux/lantiq/patches-4.14/0053-MIPS-lantiq-enable-AHB-Bus-for-USB.patch | 37 |
2 files changed, 62 insertions, 0 deletions
diff --git a/target/linux/lantiq/patches-4.14/0052-MIPS-lantiq-fix-usb-clocks.patch b/target/linux/lantiq/patches-4.14/0052-MIPS-lantiq-fix-usb-clocks.patch new file mode 100644 index 0000000000..aa3069ed9d --- /dev/null +++ b/target/linux/lantiq/patches-4.14/0052-MIPS-lantiq-fix-usb-clocks.patch @@ -0,0 +1,25 @@ +From 11e84fdfad0331555ca889c4ac6a9d5f37ae83df Mon Sep 17 00:00:00 2001 +From: Mathias Kresin <dev@kresin.me> +Date: Sat, 20 Jan 2018 14:38:40 +0100 +Subject: [PATCH] MIPS: lantiq: fix danube usb clock + +On danube the USB0 registers are at 1e101000 similar to all other lantiq +SoCs. + +Fixes: dea54fbad332 ("phy: Add an USB PHY driver for the Lantiq SoCs using the RCU module") +Signed-off-by: Mathias Kresin <dev@kresin.me> +--- + arch/mips/lantiq/xway/sysctrl.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +--- a/arch/mips/lantiq/xway/sysctrl.c ++++ b/arch/mips/lantiq/xway/sysctrl.c +@@ -581,7 +581,7 @@ void __init ltq_soc_init(void) + } else { + clkdev_add_static(ltq_danube_cpu_hz(), ltq_danube_fpi_hz(), + ltq_danube_fpi_hz(), ltq_danube_pp32_hz()); +- clkdev_add_pmu("1f203018.usb2-phy", "ctrl", 1, 0, PMU_USB0); ++ clkdev_add_pmu("1e101000.usb", "otg", 1, 0, PMU_USB0); + clkdev_add_pmu("1f203018.usb2-phy", "phy", 1, 0, PMU_USB0_P); + clkdev_add_pmu("1e103000.sdio", NULL, 1, 0, PMU_SDIO); + clkdev_add_pmu("1e103100.deu", NULL, 1, 0, PMU_DEU); diff --git a/target/linux/lantiq/patches-4.14/0053-MIPS-lantiq-enable-AHB-Bus-for-USB.patch b/target/linux/lantiq/patches-4.14/0053-MIPS-lantiq-enable-AHB-Bus-for-USB.patch new file mode 100644 index 0000000000..314ec3d8fd --- /dev/null +++ b/target/linux/lantiq/patches-4.14/0053-MIPS-lantiq-enable-AHB-Bus-for-USB.patch @@ -0,0 +1,37 @@ +From 2f57c45efb9acb5eea2d8af211ab87b3ccfbf584 Mon Sep 17 00:00:00 2001 +From: Mathias Kresin <dev@kresin.me> +Date: Sat, 20 Jan 2018 14:38:40 +0100 +Subject: [PATCH] MIPS: lantiq: enable AHB Bus for USB + +On Danube and AR9 the USB core is connected to the AHB bus, hence we need +to enable the AHB Bus as well. + +Fixes: dea54fbad332 ("phy: Add an USB PHY driver for the Lantiq SoCs using the RCU module") +Signed-off-by: Mathias Kresin <dev@kresin.me> +--- + arch/mips/lantiq/xway/sysctrl.c | 6 +++--- + 1 file changed, 3 insertions(+), 3 deletions(-) + +--- a/arch/mips/lantiq/xway/sysctrl.c ++++ b/arch/mips/lantiq/xway/sysctrl.c +@@ -570,9 +570,9 @@ void __init ltq_soc_init(void) + clkdev_add_static(ltq_ar9_cpu_hz(), ltq_ar9_fpi_hz(), + ltq_ar9_fpi_hz(), CLOCK_250M); + clkdev_add_pmu("1f203018.usb2-phy", "phy", 1, 0, PMU_USB0_P); +- clkdev_add_pmu("1e101000.usb", "otg", 1, 0, PMU_USB0); ++ clkdev_add_pmu("1e101000.usb", "otg", 1, 0, PMU_USB0 | PMU_AHBM); + clkdev_add_pmu("1f203034.usb2-phy", "phy", 1, 0, PMU_USB1_P); +- clkdev_add_pmu("1e106000.usb", "otg", 1, 0, PMU_USB1); ++ clkdev_add_pmu("1e106000.usb", "otg", 1, 0, PMU_USB1 | PMU_AHBM); + clkdev_add_pmu("1e180000.etop", "switch", 1, 0, PMU_SWITCH); + clkdev_add_pmu("1e103000.sdio", NULL, 1, 0, PMU_SDIO); + clkdev_add_pmu("1e103100.deu", NULL, 1, 0, PMU_DEU); +@@ -581,7 +581,7 @@ void __init ltq_soc_init(void) + } else { + clkdev_add_static(ltq_danube_cpu_hz(), ltq_danube_fpi_hz(), + ltq_danube_fpi_hz(), ltq_danube_pp32_hz()); +- clkdev_add_pmu("1e101000.usb", "otg", 1, 0, PMU_USB0); ++ clkdev_add_pmu("1e101000.usb", "otg", 1, 0, PMU_USB0 | PMU_AHBM); + clkdev_add_pmu("1f203018.usb2-phy", "phy", 1, 0, PMU_USB0_P); + clkdev_add_pmu("1e103000.sdio", NULL, 1, 0, PMU_SDIO); + clkdev_add_pmu("1e103100.deu", NULL, 1, 0, PMU_DEU); |