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-rw-r--r--target/linux/lantiq/patches-4.9/0027-01-net-phy-intel-xway-add-VR9-version-number.patch62
-rw-r--r--target/linux/lantiq/patches-4.9/0027-02-net-phy-intel-xway-add-VR9-v1.1-phy-ids.patch71
2 files changed, 133 insertions, 0 deletions
diff --git a/target/linux/lantiq/patches-4.9/0027-01-net-phy-intel-xway-add-VR9-version-number.patch b/target/linux/lantiq/patches-4.9/0027-01-net-phy-intel-xway-add-VR9-version-number.patch
new file mode 100644
index 0000000000..21261b4596
--- /dev/null
+++ b/target/linux/lantiq/patches-4.9/0027-01-net-phy-intel-xway-add-VR9-version-number.patch
@@ -0,0 +1,62 @@
+From 5b73d9955fb4b0e3c37f8f6c71910293246c89dc Mon Sep 17 00:00:00 2001
+From: Mathias Kresin <dev@kresin.me>
+Date: Thu, 22 Mar 2018 23:31:38 +0100
+Subject: [PATCH 1/2] net: phy: intel-xway: add VR9 version number
+
+The VR9 phy ids are matching only for the SoC version 1.2. Rename the
+macros and change the names to take this into account.
+
+Signed-off-by: Mathias Kresin <dev@kresin.me>
+Signed-off-by: David S. Miller <davem@davemloft.net>
+---
+ drivers/net/phy/intel-xway.c | 16 ++++++++--------
+ 1 file changed, 8 insertions(+), 8 deletions(-)
+
+--- a/drivers/net/phy/intel-xway.c
++++ b/drivers/net/phy/intel-xway.c
+@@ -149,8 +149,8 @@
+ #define PHY_ID_PHY22F_1_4 0xD565A410
+ #define PHY_ID_PHY11G_1_5 0xD565A401
+ #define PHY_ID_PHY22F_1_5 0xD565A411
+-#define PHY_ID_PHY11G_VR9 0xD565A409
+-#define PHY_ID_PHY22F_VR9 0xD565A419
++#define PHY_ID_PHY11G_VR9_1_2 0xD565A409
++#define PHY_ID_PHY22F_VR9_1_2 0xD565A419
+
+ #if IS_ENABLED(CONFIG_OF_MDIO)
+ static int vr9_gphy_of_reg_init(struct phy_device *phydev)
+@@ -372,9 +372,9 @@ static struct phy_driver xway_gphy[] = {
+ .suspend = genphy_suspend,
+ .resume = genphy_resume,
+ }, {
+- .phy_id = PHY_ID_PHY11G_VR9,
++ .phy_id = PHY_ID_PHY11G_VR9_1_2,
+ .phy_id_mask = 0xffffffff,
+- .name = "Intel XWAY PHY11G (xRX integrated)",
++ .name = "Intel XWAY PHY11G (xRX v1.2 integrated)",
+ .features = (PHY_GBIT_FEATURES | SUPPORTED_Pause |
+ SUPPORTED_Asym_Pause),
+ .flags = PHY_HAS_INTERRUPT,
+@@ -387,9 +387,9 @@ static struct phy_driver xway_gphy[] = {
+ .suspend = genphy_suspend,
+ .resume = genphy_resume,
+ }, {
+- .phy_id = PHY_ID_PHY22F_VR9,
++ .phy_id = PHY_ID_PHY22F_VR9_1_2,
+ .phy_id_mask = 0xffffffff,
+- .name = "Intel XWAY PHY22F (xRX integrated)",
++ .name = "Intel XWAY PHY22F (xRX v1.2 integrated)",
+ .features = (PHY_BASIC_FEATURES | SUPPORTED_Pause |
+ SUPPORTED_Asym_Pause),
+ .flags = PHY_HAS_INTERRUPT,
+@@ -412,8 +412,8 @@ static struct mdio_device_id __maybe_unu
+ { PHY_ID_PHY22F_1_4, 0xffffffff },
+ { PHY_ID_PHY11G_1_5, 0xffffffff },
+ { PHY_ID_PHY22F_1_5, 0xffffffff },
+- { PHY_ID_PHY11G_VR9, 0xffffffff },
+- { PHY_ID_PHY22F_VR9, 0xffffffff },
++ { PHY_ID_PHY11G_VR9_1_2, 0xffffffff },
++ { PHY_ID_PHY22F_VR9_1_2, 0xffffffff },
+ { }
+ };
+ MODULE_DEVICE_TABLE(mdio, xway_gphy_tbl);
diff --git a/target/linux/lantiq/patches-4.9/0027-02-net-phy-intel-xway-add-VR9-v1.1-phy-ids.patch b/target/linux/lantiq/patches-4.9/0027-02-net-phy-intel-xway-add-VR9-v1.1-phy-ids.patch
new file mode 100644
index 0000000000..9a92532908
--- /dev/null
+++ b/target/linux/lantiq/patches-4.9/0027-02-net-phy-intel-xway-add-VR9-v1.1-phy-ids.patch
@@ -0,0 +1,71 @@
+From f452518c982e57538e6d49da0a2c80eef22087ab Mon Sep 17 00:00:00 2001
+From: Mathias Kresin <dev@kresin.me>
+Date: Thu, 22 Mar 2018 23:31:39 +0100
+Subject: [PATCH 2/2] net: phy: intel-xway: add VR9 v1.1 phy ids
+
+The phys embedded into the v1.1 of the VR9 SoC are using different phy
+ids. Add the phy ids to use the driver for this VR9 version as well.
+
+Signed-off-by: Mathias Kresin <dev@kresin.me>
+Signed-off-by: David S. Miller <davem@davemloft.net>
+---
+ drivers/net/phy/intel-xway.c | 28 ++++++++++++++++++++++++++++
+ 1 file changed, 28 insertions(+)
+
+--- a/drivers/net/phy/intel-xway.c
++++ b/drivers/net/phy/intel-xway.c
+@@ -149,6 +149,8 @@
+ #define PHY_ID_PHY22F_1_4 0xD565A410
+ #define PHY_ID_PHY11G_1_5 0xD565A401
+ #define PHY_ID_PHY22F_1_5 0xD565A411
++#define PHY_ID_PHY11G_VR9_1_1 0xD565A408
++#define PHY_ID_PHY22F_VR9_1_1 0xD565A418
+ #define PHY_ID_PHY11G_VR9_1_2 0xD565A409
+ #define PHY_ID_PHY22F_VR9_1_2 0xD565A419
+
+@@ -372,6 +374,36 @@ static struct phy_driver xway_gphy[] = {
+ .suspend = genphy_suspend,
+ .resume = genphy_resume,
+ }, {
++ .phy_id = PHY_ID_PHY11G_VR9_1_1,
++ .phy_id_mask = 0xffffffff,
++ .name = "Intel XWAY PHY11G (xRX v1.1 integrated)",
++ .features = (PHY_GBIT_FEATURES | SUPPORTED_Pause |
++ SUPPORTED_Asym_Pause),
++ .flags = PHY_HAS_INTERRUPT,
++ .config_init = xway_gphy_config_init,
++ .config_aneg = genphy_config_aneg,
++ .read_status = genphy_read_status,
++ .ack_interrupt = xway_gphy_ack_interrupt,
++ .did_interrupt = xway_gphy_did_interrupt,
++ .config_intr = xway_gphy_config_intr,
++ .suspend = genphy_suspend,
++ .resume = genphy_resume,
++ }, {
++ .phy_id = PHY_ID_PHY22F_VR9_1_1,
++ .phy_id_mask = 0xffffffff,
++ .name = "Intel XWAY PHY22F (xRX v1.1 integrated)",
++ .features = (PHY_BASIC_FEATURES | SUPPORTED_Pause |
++ SUPPORTED_Asym_Pause),
++ .flags = PHY_HAS_INTERRUPT,
++ .config_init = xway_gphy_config_init,
++ .config_aneg = genphy_config_aneg,
++ .read_status = genphy_read_status,
++ .ack_interrupt = xway_gphy_ack_interrupt,
++ .did_interrupt = xway_gphy_did_interrupt,
++ .config_intr = xway_gphy_config_intr,
++ .suspend = genphy_suspend,
++ .resume = genphy_resume,
++ }, {
+ .phy_id = PHY_ID_PHY11G_VR9_1_2,
+ .phy_id_mask = 0xffffffff,
+ .name = "Intel XWAY PHY11G (xRX v1.2 integrated)",
+@@ -412,6 +444,8 @@ static struct mdio_device_id __maybe_unu
+ { PHY_ID_PHY22F_1_4, 0xffffffff },
+ { PHY_ID_PHY11G_1_5, 0xffffffff },
+ { PHY_ID_PHY22F_1_5, 0xffffffff },
++ { PHY_ID_PHY11G_VR9_1_1, 0xffffffff },
++ { PHY_ID_PHY22F_VR9_1_1, 0xffffffff },
+ { PHY_ID_PHY11G_VR9_1_2, 0xffffffff },
+ { PHY_ID_PHY22F_VR9_1_2, 0xffffffff },
+ { }